LM2742MTC National Semiconductor, LM2742MTC Datasheet - Page 2

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LM2742MTC

Manufacturer Part Number
LM2742MTC
Description
Manufacturer
National Semiconductor
Datasheet

Specifications of LM2742MTC

Lead Free Status / RoHS Status
Not Compliant

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Part Number:
LM2742MTC
Manufacturer:
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Quantity:
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Part Number:
LM2742MTCX
Manufacturer:
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Quantity:
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Connection Diagram
Ordering Information
Pin Descriptions
BOOT (Pin 1) - Supply rail for the N-channel MOSFET gate
drive. The voltage should be at least one gate threshold above
the regulator input voltage to properly turn on the high-side N-
FET.
LG (Pin 2) - Gate drive for the low-side N-channel MOSFET.
This signal is interlocked with HG to avoid shoot-through
problems.
PGND (Pins 3, 13) - Ground for FET drive circuitry. It should
be connected to system ground.
SGND (Pin 4) - Ground for signal level circuitry. It should be
connected to system ground.
V
PWGD (Pin 6) - Power Good. This is an open drain output.
The pin is pulled low when the chip is in UVP, OVP, or UVLO
mode. During normal operation, this pin is connected to V
or other voltage source through a pull-up resistor.
ISEN (Pin 7) - Current limit threshold setting. This sources a
fixed 50µA current. A resistor of appropriate value should be
connected between this pin and the drain of the low-side FET.
EAO (Pin 8) - Output of the error amplifier. The voltage level
on this pin is compared with an internally generated ramp
CC
(Pin 5) - Supply rail for the controller.
Order Number
LM2742MTCX
LM2742MTC
Package Type
TSSOP-14
TSSOP-14
14-Lead Plastic TSSOP
θ
JA
CC
= 155°C/W
2
NSC Package Drawing
signal to determine the duty cycle. This pin is necessary for
compensating the control loop.
SS (Pin 9) - Soft start pin. A capacitor connected between this
pin and ground sets the speed at which the output voltage
ramps up. Larger capacitor value results in slower output volt-
age ramp but also lower inrush current.
FB (Pin 10) - This is the inverting input of the error amplifier,
which is used for sensing the output voltage and compensat-
ing the control loop.
FREQ (Pin 11) - The switching frequency is set by connecting
a resistor between this pin and ground.
SD (Pin 12) - IC Logic Shutdown. When this pin is pulled low
the chip turns off both the high side and low side switches.
While this pin is low, the IC will not start up. An internal 20µA
pull-up connects this pin to V
the low side switch during shutdown, see the pin compatible
LM2737.
HG (Pin 14) - Gate drive for the high-side N-channel MOS-
FET. This signal is interlocked with LG to avoid shoot-through
problems.
20087511
MTC14
MTC14
CC
2500 Units on Tape and Reel
. For a device which turns on
94 Units, Raill
Supplied As

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