M27C1024-12C6 STMicroelectronics, M27C1024-12C6 Datasheet - Page 5

M27C1024-12C6

Manufacturer Part Number
M27C1024-12C6
Description
Manufacturer
STMicroelectronics
Datasheet

Specifications of M27C1024-12C6

Density
1Mb
Organization
64Kx16
Interface Type
Parallel
Bus Type
Parallel
In System Programmable
External
Access Time (max)
100ns
Package Type
PLCC
Reprogramming Technique
OTP
Operating Supply Voltage (typ)
5V
Operating Supply Voltage (min)
4.5V
Operating Supply Voltage (max)
5.5V
Supply Current
50mA
Pin Count
44
Mounting
Surface Mount
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Lead Free Status / RoHS Status
Not Compliant
Table 7. Read Mode DC Characteristics
(T
Note: 1. V
Table 8. Read Mode AC Characteristics
(T
Note: 1. V
Two Line Output Control
Because EPROMs are usually used in larger
memory arrays, this product features a 2 line con-
trol function which accommodates the use of mul-
tiple memory connection. The two line control
function allows:
a. the lowest possible memory power dissipation,
b. complete assurance that output bus contention
t
t
Symbol
GHQZ
Symbol
EHQZ
A
A
t
t
t
t
V
will not occur.
AVQV
ELQV
GLQV
AXQX
I
I
V
V
I
I
I
IH
CC1
CC2
V
= 0 to 70 C, –40 to 85 C; –40 to 105 C or –40 to 125 C; V
= 0 to 70 C, –40 to 85 C; –40 to 105 C or –40 to 125 C; V
I
LO
CC
PP
OH
LI
OL
2. Maximum DC voltage on Output is V
2. Sampled only, not 100% tested.
3. Speed obtained with High Speed AC measurement conditions.
IL
(2)
(2)
(2)
CC
CC
must be applied simultaneously with or before V
t
must be applied simultaneously with or before V
Input Leakage Current
Output Leakage Current
Supply Current
Supply Current (Standby) TTL
Supply Current (Standby) CMOS
Program Current
Input Low Voltage
Input High Voltage
Output Low Voltage
Output High Voltage TTL
Output High Voltage CMOS
ACC
t
t
Alt
t
t
t
OE
OH
CE
DF
DF
Address Valid to Output Valid
Chip Enable Low to Output Valid
Output Enable Low to Output Valid
Chip Enable High to Output Hi-Z
Output Enable High to Output Hi-Z
Address Transition to Output
Transition
Parameter
Parameter
CC
+0.5V.
(1)
(1)
PP
PP
I
OUT
and removed simultaneously or after V
Test Conditio n
E = V
E = V
and removed simultaneously or after V
0V
E = V
Test Condition
E > V
0V
I
I
OH
OH
I
= 0mA, f = 5MHz
OL
V
G = V
E = V
G = V
E = V
PP
IL
IL
E = V
V
For the most efficient use of these two control
lines, E should be decoded and used as the prima-
ry device selecting function, while G should be
made a common connection to all devices in the
array and connected to the READ line from the
system control bus. This ensures that all deselect-
ed memory devices are in their low power standby
mode and that the output pins are only active
when data is required from a particular memory
device.
= –400 A
= –100 A
IL
V
= 2.1mA
, G = V
, G = V
CC
OUT
, G = V
IN
= V
IL
IL
IL
IL
– 0.2V
IH
CC
V
V
IL
IL
CC
CC
IL
,
CC
CC
Min
0
0
0
-35
= 5V
= 5V
(3)
Max
35
35
20
20
15
V
5% or 5V
5% or 5V
CC
M27C1024
Min
–0.3
Min
0
0
0
2.4
PP
PP
-45
– 0.7V
2
.
.
(3)
Max
45
45
25
30
30
10%; V
10%; V
V
Min
CC
Max
0
0
0
100
100
0.8
0.4
35
-55
10
10
1
M27C1024
+ 1
(3)
Max
55
55
30
30
30
PP
PP
= V
= V
Unit
mA
mA
Unit
V
V
V
V
V
A
A
A
A
ns
ns
ns
ns
ns
ns
5/16
CC
CC
)
)

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