AT88SC0808CA-TU Atmel, AT88SC0808CA-TU Datasheet - Page 16

• Manufacturer Part Number: AT88SC0808CA-TU
• Manufacturer: Atmel

Specifications of AT88SC0808CA-TU

• Operating Temperature (max): 85C
• Operating Temperature (min): -40C
• Mounting: Surface Mount
• Pin Count: 8
• Operating Temperature Classification: Industrial
• Lead Free Status / RoHS Status: Compliant

15. Asynchronous T = 0 Protocol
16. Initial Device Programming
16
AT88SC0808CA [Preliminary]
The device will respond with a 64-bit ATR code, including historical bytes to indicate the memory
density within the CryptoMemory family.
Once asynchronous mode has been selected, it is not possible to switch to synchronous mode
without first powering off the device.
Figure 15-1. Asynchronous T = 0 Protocol (Gemplus Patent)
Enabling the security features of CryptoMemory requires prior personalization. Personalization
entails setting up of desired access rights by zones, passwords and key values, programming
these values into the configuration memory with verification using simple WRITE and READ
commands, and then blowing fuses to lock this information in place.
Gaining access to the configuration memory requires successful presentation of a secure (or
transport) code. The initial signature of the secure (transport) code for the AT88SC0808CA
device is $22 E8 3F. This is the same as the WRITE 7 password. The user may elect to change
the signature of the secure code anytime after successful presentation.
After writing and verifying data in the configuration memory, the security fuses MUST be blown
to lock this information in the device. For additional information on personalizing CryptoMemory,
please see the application notes Programming CryptoMemory for Embedded Applications and
Initia lizing CryptoM emory for Smart Card Applications from th e product page at
www.atmel.com/products/securemem.
CLK-SCL
– This power-up sequence complies to ISO 7816-3 for a cold reset in smart card
– VCC goes high; RST, I/O (SDA) and CLK (SCL) are low.
– Set I/O (SDA) in receive mode.
– Provide a clock signal to CLK (SCL).
– RST goes high after 400 clock cycles.
I/O-SDA
applications.
RST
V cc
ATR
5204AS–CRYPT–6/08