ISP1582BSUM STEricsson, ISP1582BSUM Datasheet - Page 11

• Manufacturer Part Number: ISP1582BSUM
• Manufacturer: STEricsson

Specifications of ISP1582BSUM

• Operating Temperature (max): 85C
• Operating Temperature (min): -40C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 56
• Lead Free Status / RoHS Status: Compliant

Table 4.
[1]
ISP1582_9
Product data sheet
V
0 V
3.3 V V
3.3 V V
CC
Dead: The USB cable is plugged out, and V
V
0 V
CC(I/O)
CC
CC
ISP1582 pin status
7.10 System controller
7.11 Pins status
State
dead
reset
after reset state depends on how the pin is driven output
7.7 ST-Ericsson Serial Interface Engine (SIE)
7.8 SoftConnect
7.9 Reconfiguring endpoints
[1]
The ST-Ericsson SIE implements the full USB protocol layer. It is completely hardwired for
speed and needs no firmware intervention. The functions of this block include:
synchronization pattern recognition, parallel or serial conversion, bit-stuffing or de-stuffing,
CRC checking or generation, Packet IDentifier (PID) verification or generation, address
recognition, handshake evaluation or generation.
The USB connection is established by pulling pin DP (for full-speed devices) to HIGH
through a 1.5 kΩ pull-up resistor. In the ISP1582, an external 1.5 kΩ pull-up resistor must
be connected between pin RPU and 3.3 V. Pin RPU connects the pull-up resistor to pin
DP, when bit SOFTCT in the Mode register is set (see
hardware reset, the pull-up resistor is disconnected by default (bit SOFTCT = 0). The USB
bus reset does not change the value of bit SOFTCT.
When V
back-drive voltage.
The ISP1582 endpoints have a limitation when implementing a composite device with at
least two functionalities that require the support of alternate settings, for example, the
video class and audio class devices. The ISP1582 endpoints cannot be reconfigured on
the fly because it is implemented as a FIFO base. The internal RAM partition will be
corrupted if there is a need to reconfigure endpoints on the fly because of alternate
settings request, causing data corruption.
For details and workaround, refer to
application with alternate settings
The system controller implements the USB power-down capabilities of the ISP1582.
Registers are protected against data corruption during wake-up following a resume (from
the suspend state) by locking the write access, until an unlock code is written in the
Unlock Device register (see
Table 4
conditions.
Pin
Input
unknown
state depends on how the pin is driven output
illustrates the behavior of ISP1582 pins with V
BUS
is not present, the SOFTCT bit must be set to logic 0 to comply with the
CC(I/O)
Rev. 09 — 29 September 2009
is not available.
Table 69
(AN10071)”.
Ref. 3 “Using ISP1582/3 in a composite device
and
Output
unknown
Table
70).
I/O
unknown
high-Z
state depends on how the pin is configured
Hi-Speed USB peripheral controller
CC(I/O)
Table 18
and V
and
CC
© ST-ERICSSON 2009. All rights reserved.
Table
in various operating
ISP1582
19). After a
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