ISP1582BSUM STEricsson, ISP1582BSUM Datasheet - Page 7

ISP1582BSUM

Manufacturer Part Number
ISP1582BSUM
Description
Manufacturer
STEricsson
Datasheet

Specifications of ISP1582BSUM

Operating Temperature (max)
85C
Operating Temperature (min)
-40C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
56
Lead Free Status / RoHS Status
Compliant

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Part Number
Manufacturer
Quantity
Price
Part Number:
ISP1582BSUM
Manufacturer:
INTEL
Quantity:
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ISP1582_9
Product data sheet
Table 2.
[1]
[2]
[3]
Symbol
DATA13
DATA14
DATA15
V
V
VCC1V8
XTAL2
XTAL1
V
V
WAKEUP
SUSPEND 56
GND
CC(I/O)
BUS
CC
CC
[3]
[3]
Symbol names ending with underscore N (for example, NAME_N) represent active LOW signals.
All outputs and I/O pins can source 4 mA, unless otherwise specified.
Add a decoupling capacitor (0.1 μF) to all the supply pins. For better EMI results, add a 0.01 μF capacitor in
parallel to the 0.1 μF.
[3]
[1]
[3]
Pin description
Pin
45
46
47
48
49
50
51
52
53
54
55
exposed
die pad
Rev. 09 — 29 September 2009
Type
I/O
I/O
I/O
-
A
-
O
I
-
-
I
O
-
…continued
[2]
Description
bit 13 of bidirectional data bus
bidirectional pad; 4 ns slew-rate control; TTL; 5 V tolerant
bit 14 of bidirectional data bus
bidirectional pad; 4 ns slew-rate control; TTL; 5 V tolerant
bit 15 of bidirectional data bus
bidirectional pad; 4 ns slew-rate control; TTL; 5 V tolerant
supply voltage; used to supply voltage to the I/O pads; see
Section 7.15
USB bus power sensing input — Used to detect whether the
host is connected or not; connect a 1 μF electrolytic or tantalum
capacitor, and a 1 MΩ pull-down resistor to ground; see
Section 7.13
V
electrolytic or tantalum capacitor, and a 1 MΩ pull-down resistor
to ground; see
5 V tolerant
voltage regulator output (1.8 V ± 0.15 V); tapped out voltage
from the internal regulator; this regulated voltage cannot drive
external devices; decouple this pin using 4.7 μF and 0.1 μF
capacitors; see
crystal oscillator output (12 MHz); connect a fundamental
parallel-resonant crystal; leave this pin open when using an
external clock source on pin XTAL1; see
crystal oscillator input (12 MHz); connect a fundamental
parallel-resonant crystal or an external clock source (leaving
pin XTAL2 unconnected); see
supply voltage (3.3 V ± 0.3 V); this pin supplies the internal
voltage regulator and the analog circuit; see
supply voltage (3.3 V ± 0.3 V); this pin supplies the internal
voltage regulator and the analog circuit; see
wake-up input; when this pin is at the HIGH level, the chip is
prevented from getting into the suspend state and wake-up the
chip when already in suspend mode; when not in use, connect
this pin to ground through a 10 kΩ resistor
When the RESET_N pin is LOW, ensure that the WAKEUP pin
does not go from LOW to HIGH; otherwise the device will enter
test mode.
input pad; TTL; 5 V tolerant
suspend state indicator output; used as a power switch control
output to power-off or power-on external devices when going
into suspend mode or recovering from suspend mode
CMOS output; 8 mA drive
ground supply; down bonded to the exposed die pad (heat sink);
to be connected to DGND during PCB layout
BUS
pulsing output — In OTG mode; connect a 1 μF
Section 7.13
Section 7.15
Hi-Speed USB peripheral controller
Table 79
Table 79
© ST-ERICSSON 2009. All rights reserved.
Section 7.15
Section 7.15
ISP1582
7 of 64

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