ATA555812-DDW Atmel, ATA555812-DDW Datasheet - Page 3

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ATA555812-DDW

Manufacturer Part Number
ATA555812-DDW
Description
Manufacturer
Atmel
Datasheet

Specifications of ATA555812-DDW

Operating Temperature (max)
85C
Operating Temperature (min)
-40C
Operating Temperature Classification
Industrial
Lead Free Status / RoHS Status
Not Compliant
2.2
2.3
2.4
4681C–RFID–09/05
Power-On Reset (POR) and Initialization
Control Logic
Modulator
The Power-On-Reset circuit (POR) maintains the circuit in a reset state until an adequate inter-
nal operating voltage threshold level has been reached, whereupon a default start-up delay
sequence is started. During this period of 200 field clock cycles, the configuration and security
setup is initialized from the System Configuration and Page Security blocks.
The control logic is responsible for the following functions:
The modulator output circuitry controls the switching of a resistive load between the Coil 1 and
Coil 2 pads to transmit data from the tag to the interrogator (uplink). The ASK load modulator is
driven from the Manchester, Bi-phase encoder or directly from the EEPROM memory data
stream (NRZ) according to the uplink encoding configuration.
Table 2-1.
Figure 2-1.
Uplink Mode
ASK-coded
modulation
Note:
• Initialization and reloading of the configuration from EEPROM
• Control of read and write memory access operations
• Data transmission and command decoding
• CRC check, error detection and error handling
1. Since Bi-phase encoding is data dependent the following definitions apply to the ATA5558
NRZ data stream
coded Modulator
Manchester coded
Manchester
implementation.
- The tag modulates the first (half) bit period after SOF.
- If the last bit of a data stream is a logical 1 it is possible that this bit period is non-modu-
lated and therefore is not detectable directly by the reader.
signal
RF field
Types of Modulation
Manchester Timing Diagram
Manchester Encoding
0 = falling edge on mid bit
1 = rising edge on mid bit
Data rate = F
1
RF
/16
Bi-phase Encoding
0 = rising or falling edge
1 = no edge on mid bit
0
ATA5558 [Preliminary]
0
(1)
NRZ – Direct Data
1 = modulation off
0 = modulation on
1
3

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