ATA555812-DDW Atmel, ATA555812-DDW Datasheet - Page 4

• Manufacturer Part Number: ATA555812-DDW
• Manufacturer: Atmel

Specifications of ATA555812-DDW

• Operating Temperature (max): 85C
• Operating Temperature (min): -40C
• Operating Temperature Classification: Industrial
• Lead Free Status / RoHS Status: Not Compliant

2.5
2.6
2.6.1
4
Binary Bit Rate Generator
Memory Section
ATA5558 [Preliminary]
Memory Map
Figure 2-2.
The tag’s data rate is binary programmable in the configuration register to operate at any bit rate
between RF/2 and RF/64.
The physical memory is subdivided into two logical sections (see
memory section contains the 1024 bits of user data. The second logical memory section con-
tains 320 bits of system/configuration data. Both memories are organized in 32-bit data blocks,
each block being equipped with a single lock bit, with which the associated block can be write
protected. Command controlled programming and reading always takes place on a serial MSB
first block basis so that a block constitutes the smallest directly accessible data unit. The user
memory is further subdivided into 8 pages, each of 4 blocks in size. This provides the basis of
the page security scheme
Figure 2-3.
Data rate
31
31
30
29
28
27
4
3
2
1
0
:
7
6
5
L
L
L
L
L
L
L
L
L
L
L
L
L
:
L
=
31 30 29
NRZ data stream
Biphase coded
Modulator signal
Bi-phase coded
-------------------- -
2 n
RF field
RF
User data block31/page7
User data block30/page7
User data block29/page7
User data block28/page7
User data block27/page6
Bi-phase Timing Diagram
Memory Map Structure
User data block7/page1
User data block6/page1
User data block5/page1
User data block4/page1
User data block3/page0
User data block2/page0
User data block1/page0
User data block0/page0
User memory
+
1
bit position
Data rate = F
:
(“Password Protection” on page
1
RF
/8
2
0
1
0
1Fh
1Eh
1Dh
1Ch
1Bh
07h
06h
05h
04h
03h
02h
01h
00h
0
63
62
61
60
59
58
57
56
55
54 L
1
L
L
L
L
L
L
L
L
L
L
31
6).
1
30 29
Password/Page Security
System memory
Lock bits
Password - Read
Password - Write
Configuration
Traceability 3
Traceability 2
Traceability 1
1
Figure
Tag ID 3
Tag ID 2
Tag ID 1
bit position
2-3). The first logical
0
4681C–RFID–09/05
2
1
1
0
3Eh
3Dh
3Ch
3Bh
3Ah
3Fh
39h
38h
37h
36h