DM9602 E2V, DM9602 Datasheet - Page 4

• Manufacturer Part Number: DM9602
• Manufacturer: E2V

Specifications of DM9602

• Lead Free Status / RoHS Status: Supplier Unconfirmed

Operating Rules
5 To obtain variable pulse width by remote trimming the
6 Under any operating condition C
B Use with high inverse leakage current electrolytic ca-
C Use to obtain extended pulse widths
following circuit is recommended
kept as close to the circuit as possible to minimize stray
capacitance and reduce noise pickup
This configuration is not recommended with retriggera-
ble operation
pacitors
The diode in this configuration prevents high inverse
leakage currents through the capacitor by preventing
an inverse voltage across the capacitor The use of
this configuration is not recommended with retriggera-
ble operation
This configuration can be used to obtain extended
pulse widths because of the larger timing resistor al-
lowed by beta multiplication Electrolytics with high in-
verse leakage currents can be used
R
lesser
R
(5 k
Q1 NPN silicon transistor with h
above equations such as 2N5961 or 2N5962
X
k
(min)
R
s
X
(0 7) (h
R
k
Y s
R
Y k
10 k
FE
t
t
R
Q1) or
X
(max)
is recommended)
(Continued)
0 3 RC
0 3 RC
k
2 5 M
X
X
X
and R
FE
whichever is the
requirements of
X
(min) must be
TL F 6611–5
TL F 6611–6
TL F 6611–7
4
7 Input Trigger Pulse Rules (See Triggering Truth Table)
8 The retriggerable pulse width is calculated as shown be-
9 Reset Operation An overriding clear (active LOW level)
10 V
refer to the NSC one-shot application note AN-366
For further detailed device characteristics and output performance please
t
Input to Pin 5(11)
Pin 4(12)
t
t
Input to Pin 4(12)
Pin 5(11)
low
The retrigger pulse width is equal to the pulse width (t) plus a delay time For
pulse widths greater than 500 ns t
not occur if the retrigger pulse comes within
pulse (i e during the discharge cycle)
is provided on each one shot By applying a LOW to the
reset any timing cycle can be terminated or any new cy-
cle inhibited until the LOW reset input is removed Trigger
inputs will not produce spikes in the output when the re-
set is held LOW
W
1
2
frequency standards so that switching transients on V
and Ground leads do not cause interaction between one
shots Use of a 0 01 to 0 1
tween V
ommended
CC
e
t
t
3
4
e
e
t
and Ground wiring should conform to good high
a
Min Positive Input Pulse Width
Min Negative Input Pulse Width
CC
t
e
e
PLH
and Ground located near the DM9602 is rec-
LOW
HIGH
e
K R
X
C
X
W
can be approximated as t Retriggering will
1
a
R
F bypass capacitor be-
1
0 3 C
X
X
(Pin 3(13)
(Pin 3(13)
a
(ns) after the initial trigger
l
t
PLH
l
40 ns
40 ns
TL F 6611– 10
TL F 6611– 11
TL F 6611– 8
TL F 6611– 9
e
e
HIGH)
HIGH)
CC