SLATA128MM1UI STEC, SLATA128MM1UI Datasheet - Page 7

• Manufacturer Part Number: SLATA128MM1UI
• Manufacturer: STEC
• Type: PC Cardr

Specifications of SLATA128MM1UI

• Density: 128MByte
• Operating Supply Voltage (typ): 3.3/5V
• Operating Temperature (min): -40C
• Operating Temperature (max): 85C
• Package Type: Not Required
• Mounting: Socket
• Pin Count: 68
• Operating Temperature Classification: Industrial
• Operating Supply Voltage (min): 3.18/4.75V
• Operating Supply Voltage (max): 3.465/5.25V
• Programmable: Yes
• Lead Free Status / RoHS Status: Compliant

SLATAxxx(M/G)M1U(I)
Datasheet
-OE
(PC Card I/O Mode)
-ATASEL
(True IDE Mode)
RDY/-BSY
(PC Card Memory Mode)
-IREQ
(PC Card I/O Mode)
INTRQ
(True IDE Mode)
A10-A0
(PC Card Memory Mode)
A10-A0
(PC Card I/O Mode)
A2-A0
(True IDE Mode)
-CE1, -CE2
(PC Card Memory Mode
Card Enable
-CE1, -CE2
(PC Card I/O Mode)
Card Enable
-CS0, -CS1
(True IDE Mode)
-CSEL
(PC Card Memory Mode)
-CSEL
(PC Card I/O Mode)
-CSEL
(True IDE Mode)
-REG
(PC Card Memory Mode)
Attribute Memory Select
Signal Name
Type
O
I
I
I
I
27, 28, 29
8, 11, 12,
Number
61000-04497-117, April 2008
22, 23,
24, 25,
26, 27,
28, 29
7, 42
Pin
16
56
61
In PC Card I/O Mode, this signal is used to read the CIS and
configuration registers.
To enable True IDE Mode, this input should be grounded by
the host.
In Memory Mode, this signal is set high when the ATA PC
Card is ready to accept a new data transfer operation and
held low when the ATA PC Card is busy. The host must
provide a pull-up resistor. At power up and at reset, the
RDY/-BSY signal is held low (busy) until the ATA PC Card
completes its power up or reset function. No access of any
type should be made to the ATA PC Card during this time.
The
RDY/-BSY signal is held high (disabled from being busy)
when the ATA PC Card is powered up with RESET
continuously disconnected or asserted high.
After the ATA PC Card has been configured for I/O operation,
this signal is used as the active low interrupt request. This
line is strobed low to generate a pulse mode interrupt or held
low for a level mode interrupt.
In True IDE Mode, this signal is the active high interrupt
request to the host.
These address lines along with the -REG signal are used to
select the following: the I/O port address registers within the
ATA PC Card, the memory mapped port address registers
within the ATA PC Card, a byte in the CIS and the
Configuration Control and Status Registers.
This signal is the same as the PC Card Memory Mode signal.
In True IDE Mode only, A2:A0 are used to select the one of
eight registers in the Task File. The remaining address lines
should be grounded.
These input signals are used both to select the ATA PC Card
and to indicate to the ATA PC Card whether a byte or a word
operation is being performed. -CE2 always accesses the odd
byte of the word. -CE1 accesses the even byte or the odd
byte of the word depending on A0 and -CE2. A multiplexing
scheme based on A0, -CE1, -CE2 allows 8-bit hosts to
access all data on D0-D7.
This signal is the same as the PC Card Memory Mode signal.
In the True IDE Mode, -CS0 is the chip select for the task file
registers while -CS1 is used to select the Alternate Status
Register and the ATA PC Card Control Register.
This signal is not used for this mode.
This signal is not used for this mode.
This internally pulled up signal is used to configure the card
as a Master or Slave. When the pin is grounded, the card is
configured as a Master. When the pin is open, the card is
configured as a Slave.
This signal distinguishes between accesses to Common
Memory (high) and Register Attribute Memory (low).
Description
ATA PC Card
7