MM74HC123AMTCX_NF40 Fairchild Semiconductor, MM74HC123AMTCX_NF40 Datasheet

MM74HC123AMTCX_NF40

Manufacturer Part Number

MM74HC123AMTCX_NF40

Description

Manufacturer

Fairchild Semiconductor

Datasheet

1.MM74HC123AMTCX_NF40.pdf (10 pages)

Specifications of MM74HC123AMTCX_NF40

Logic Family

High Level Output Current

-5.2mA

Low Level Output Current

5.2mA

Quiescent Current

8nA

Number Of Elements

Operating Temperature Classification

Industrial

Operating Supply Voltage (max)

Operating Supply Voltage (typ)

2.5/3.3/5V

Operating Temperature (min)

-40C

Operating Temperature (max)

85C

Technology

CMOS

Abs. Propagation Delay Time

250ns

Operating Supply Voltage (min)

Lead Free Status / RoHS Status

Compliant

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MM74HC123AM

MM74HC123ASJ

MM74HC123AMTC

MM74HC123AN

MM74HC123A

Dual Retriggerable Monostable Multivibrator

General Description

The MM74HC123A high speed monostable multivibrators

(one shots) utilize advanced silicon-gate CMOS technol-

ogy. They feature speeds comparable to low power Schot-

tky TTL circuitry while retaining the low power and high

noise immunity characteristic of CMOS circuits.

Each multivibrator features both a negative, A, and a posi-

tive, B, transition triggered input, either of which can be

used as an inhibit input. Also included is a clear input that

when taken low resets the one shot. The MM74HC123A

can be triggered on the positive transition of the clear while

A is held LOW and B is held HIGH.

The MM74HC123A is retriggerable. That is it may be trig-

gered repeatedly while their outputs are generating a pulse

and the pulse will be extended.

Pulse width stability over a wide range of temperature and

supply is achieved using linear CMOS techniques. The out-

put pulse equation is simply: PW

PW is in seconds, R is in ohms, and C is in farads. All

inputs are protected from damage due to static discharge

by diodes to V

Ordering Code:

Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.

Connection Diagram

Order Number

and ground.

Package Number

Top View

MTC16

M16A

M16D

N16E

EXT

16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow

16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide

16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide

16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide

) (C

EXT

DS005206

); where

Features

Note: Pin 6 and Pin 14 must be hard-wired to GND.

Typical propagation delay: 25 ns

Wide power supply range: 2V–6V

Low quiescent current: 80 A maximum (74HC Series)

Low input current: 1 A maximum

Fanout of 10 LS-TTL loads

Simple pulse width formula T

Wide pulse range: 400 ns to

Part to part variation: 5% (typ)

Schmitt Trigger A & B inputs allow rise and fall times to

be as slow as one second

Package Description

Timing Component

September 1983

Revised May 2001

(typ)

www.fairchildsemi.com

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MM74HC123AMTCX_NF40 Summary of contents

Page 1

... Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Connection Diagram Top View © 2001 Fairchild Semiconductor Corporation Features Typical propagation delay Wide power supply range: 2V–6V ...

Page 2

Truth Table Inputs Clear HIGH Level L LOW Level Transition from LOW-to-HIGH Transition from HIGH-to-LOW One HIGH Level Pulse One LOW Level Pulse X Irrelevant Logic Diagram www.fairchildsemi.com Outputs ...

Page 3

Absolute Maximum Ratings (Note 2) Supply Voltage ( Input Voltage ( Output Voltage ( OUT Clamp Diode Current ( Output Current, ...

Page 4

AC Electrical Characteristics 5V pF Symbol Parameter t Maximum Trigger Propagation Delay PLH Clear Maximum Trigger Propagation Delay PHL ...

Page 5

Theory of Operation Trigger Operation As shown in Figure 1 and the logic diagram, before an input trigger occurs, the one shot is in the quiescent state with the Q output LOW, and the timing capacitor C pletely charged to ...

Page 6

Theory of Operation (Continued) Reset Operation These one shots may be reset during the generation of the output pulse. In the reset mode of operation, an input pulse on clear sets the reset latch and causes the capacitor to be ...

Page 7

Physical Dimensions inches (millimeters) unless otherwise noted 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow Package Number M16A 7 www.fairchildsemi.com ...

Page 8

Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide www.fairchildsemi.com Package Number M16D 8 ...

Page 9

Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide Package Number MTC16 9 www.fairchildsemi.com ...

Page 10

Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right ...

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