LFEC10E-3F484C LATTICE SEMICONDUCTOR, LFEC10E-3F484C Datasheet - Page 104

• Manufacturer Part Number: LFEC10E-3F484C
• Description: FPGA LatticeEC Family 10200 Cells 340MHz 130nm (CMOS) Technology 1.2V 484-Pin FBGA
• Manufacturer: LATTICE SEMICONDUCTOR

Specifications of LFEC10E-3F484C

• Package: 484FBGA
• Family Name: LatticeEC
• Device Logic Units: 10200
• Maximum Internal Frequency: 340 MHz
• Typical Operating Supply Voltage: 1.2 V
• Maximum Number Of User I/os: 288
• Ram Bits: 282624
• In System Programmability: Yes

Lattice Semiconductor
LFECP/EC6, LFECP/EC10, LFECP/EC15 Logic Signal Connections:
484 fpBGA
Number
GND
GND
GND
GND
GND
Ball
D4
E4
C3
B2
E5
D3
C2
G4
E3
D2
B1
C1
E2
G5
H6
G3
H4
H5
E1
D1
H3
G2
H2
G1
H1
K4
K5
K3
K2
K1
F5
F4
F3
J5
F2
F1
J4
J3
J2
J1
L3
L4
L5
L2
L1
Function
PL11A
PL11B
PL12A
PL12B
GND7
GND7
XRES
PL2A
PL2B
PL3A
PL3B
PL4A
PL4B
PL5A
PL5B
PL6A
PL6B
PL7A
PL7B
PL8A
PL8B
PL9A
PL9B
Ball
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
-
-
-
LFECP6/LFEC6
Bank LVDS
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
6
6
6
6
6
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
C
C
C
C
C
C
C
C
C
C
T
T
T
T
T
T
T
T
T
T
PCLKC7_0
PCLKT7_0
VREF2_7
VREF1_7
Function
LDQS6
Dual
Number
GND
GND
GND
GND
GND
Ball
D4
C3
D3
C2
G4
D2
C1
G5
H6
G3
H4
H5
D1
H3
G2
H2
G1
H1
E4
B2
E5
F5
F4
E3
B1
F3
E2
F2
F1
E1
K4
K5
K3
K2
K1
L3
L4
L5
L2
L1
J5
J4
J3
J2
J1
Function
PL11A
PL11B
PL12A
PL12B
PL13A
PL13B
PL14A
PL14B
PL15A
PL15B
PL16A
PL16B
PL17A
PL17B
PL18A
PL18B
PL20A
PL20B
PL21A
PL21B
GND7
GND7
GND7
GND7
XRES
PL2A
PL2B
PL3A
PL3B
PL4A
PL4B
PL5A
PL5B
PL6A
PL6B
PL7A
PL7B
PL8A
PL8B
PL9A
PL9B
Ball
NC
NC
NC
NC
NC
NC
NC
NC
-
LFECP10/LFEC10
Bank LVDS
4-38
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
6
6
6
6
6
-
-
-
-
-
-
-
-
-
C
C
C
C
C
C
C
C
C
C
C
C
C
C
C
C
C
C
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
LUM0_PLLC_FB_A
LUM0_PLLC_IN_A
LUM0_PLLT_FB_A
LUM0_PLLT_IN_A
PCLKT7_0
PCLKC7_0
Function
VREF2_7
VREF1_7
LDQS15
LDQS6
Dual
LatticeECP/EC Family Data Sheet
Number
GND
GND
GND
GND
GND
Ball
G4
G5
G3
G2
G1
D4
E4
C3
B2
E5
F5
D3
C2
F4
E3
D2
B1
C1
F3
E2
H6
H4
H5
F2
F1
E1
D1
H3
H2
H1
K4
K5
K3
K2
K1
L3
L4
L5
L2
L1
J5
J4
J3
J2
J1
Function
PL11A
PL11B
PL12A
PL12B
PL13A
PL13B
PL14A
PL14B
PL15A
PL15B
PL16A
PL16B
PL17A
PL17B
PL18A
PL18B
PL19A
PL19B
PL20A
PL20B
PL21A
PL21B
PL22A
PL22B
PL24A
PL24B
PL25A
PL25B
GND7
GND7
GND7
GND7
GND7
XRES
PL4A
PL5A
PL7A
PL2A
PL2B
PL3A
PL3B
PL4B
PL5B
PL6A
PL6B
PL7B
PL8A
PL8B
PL9A
PL9B
Ball
LFECP/LFEC15
Pinout Information
Bank LVDS
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
6
6
6
6
6
C
C
C
C
C
C
C
C
C
C
C
C
C
C
C
C
C
C
C
C
C
C
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
LUM0_PLLC_FB_A
LUM0_PLLC_IN_A
LUM0_PLLT_FB_A
LUM0_PLLT_IN_A
PCLKC7_0
PCLKT7_0
Function
VREF2_7
VREF1_7
LDQS19
LDQS6
Dual