LFX125EB-04F256I LATTICE SEMICONDUCTOR, LFX125EB-04F256I Datasheet - Page 69

• Manufacturer Part Number: LFX125EB-04F256I
• Description: FPGA ispXPGA® Family 139K Gates 1936 Cells EECMOS Technology 2.5V/3.3V 256-Pin FBGA
• Manufacturer: LATTICE SEMICONDUCTOR

Specifications of LFX125EB-04F256I

• Package: 256FBGA
• Family Name: ispXPGA®
• Device Logic Units: 1936
• Device System Gates: 139000
• Number Of Registers: 3800
• Typical Operating Supply Voltage: 2.5|3.3 V
• Maximum Number Of User I/os: 160
• Ram Bits: 94208
• Re-programmability Support: Yes

Lattice Semiconductor
ispXPGA Logic Signal Connections: 256-Ball fpBGA
256-fpBGA
Ball
G1
G2
G3
G4
C2
D2
B1
C1
D3
E3
D1
E1
E2
E4
H1
H2
H4
H3
H5
K1
K4
K3
F2
F1
F3
F4
J1
J4
J2
J3
J5
L1
L4
-
-
-
-
-
-
-
-
-
GND (Bank 0)
GND (Bank 0)
GND (Bank 0)
GND (Bank 0)
GND (Bank 1)
Signal Name
BK0_IO10
BK0_IO11
BK0_IO12
BK0_IO13
BK0_IO14
BK0_IO15
BK0_IO18
BK0_IO19
BK0_IO20
BK0_IO21
BK0_IO22
BK0_IO23
BK0_IO24
BK0_IO25
BK0_IO2
BK0_IO3
BK0_IO6
BK0_IO7
BK0_IO8
BK0_IO9
BK1_IO0
BK1_IO1
BK1_IO2
BK1_IO3
BK1_IO4
BK1_IO5
BK1_IO6
GNDP0
GCLK0
GCLK1
VCCP0
GCLK2
GCLK3
-
-
-
-
SS_CLKOUT0P
SS_CLKOUT0N
HSI0A_SOUTN
HSI0B_SOUTN
HSI0A_SOUTP
HSI0B_SOUTP
SS_CLKIN0P
HSI0A_SINP
HSI0A_SINN
HSI0B_SINP
HSI0B_SINN
CLK_OUT0
CLK_OUT1
CLK_OUT2
CLK_OUT3
PLL_RST1
PLL_RST0
PLL_FBK0
PLL_FBK1
PLL_FBK2
PLL_FBK3
Function
Second
VREF0
LFX200
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
sysHSI Reserved
LVDS Pair0N
LVDS Pair0P
LVDS Pair1P
LVDS Pair1N
LVDS Pair/
1N/HSI0
3P/HSI0
3N/HSI0
4N/HSI0
5P/HSI0
5N/HSI0
6N/HSI0
7P/HSI0
7N/HSI0
1P/HSI0
4P/HSI0
6P/HSI0
10N
11N
12N
13N
14N
15N
10P
11P
12P
13P
14P
15P
16P
9N
9P
-
-
-
-
-
-
-
-
-
-
-
65
2
GND (Bank 0)
GND (Bank 0)
GND (Bank 0)
GND (Bank 1)
Signal Name
BK0_IO10
BK0_IO11
BK0_IO12
BK0_IO13
BK0_IO14
BK0_IO15
BK0_IO16
BK0_IO17
BK0_IO18
BK0_IO19
BK0_IO20
BK0_IO21
BK0_IO0
BK0_IO1
BK0_IO4
BK0_IO5
BK0_IO6
BK0_IO7
BK0_IO8
BK0_IO9
BK1_IO0
BK1_IO1
BK1_IO2
BK1_IO3
BK1_IO4
BK1_IO5
BK1_IO6
GNDP0
GCLK0
GCLK1
VCCP0
GCLK2
GCLK3
-
-
-
-
-
ispXPGA Family Data Sheet
SS_CLKOUT0N
SS_CLKOUT0P
HSI0A_SOUTP
HSI0A_SOUTN
HSI0B_SOUTP
HSI0B_SOUTN
SS_CLKIN0P
HSI0A_SINP
HSI0A_SINN
HSI0B_SINP
HSI0B_SINN
CLK_OUT0
CLK_OUT1
CLK_OUT2
CLK_OUT3
PLL_FBK0
PLL_RST1
PLL_FBK1
PLL_RST0
PLL_FBK2
PLL_FBK3
Function
Second
VREF0
LFX125
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
sysHSI Reserved
LVDS Pair0P
LVDS Pair0N
LVDS Pair1P
LVDS Pair1N
LVDS Pair/
2N/HSI0
3N/HSI0
4N/HSI0
5N/HSI0
6N/HSI0
7N/HSI0
8N/HSI0
2P/HSI0
3P/HSI0
4P/HSI0
5P/HSI0
6P/HSI0
7P/HSI0
8P/HSI0
10N
11N
12N
13N
10P
11P
12P
13P
14P
0P
0N
9P
9N
-
-
-
-
-
-
-
-
-
-
-
2