ICS9248DF-39LF IDT, Integrated Device Technology Inc, ICS9248DF-39LF Datasheet - Page 13

• Manufacturer Part Number: ICS9248DF-39LF
• Description: IC GEN/BUFFER PENTIUM PRO 48SSOP
• Manufacturer: IDT, Integrated Device Technology Inc
• Type: Frequency Generatorr

Specifications of ICS9248DF-39LF

• Input: Crystal
• Output: Clock
• Frequency - Max: 150MHz
• Voltage - Supply: 3.135 V ~ 3.465 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 48-SSOP
• Frequency-max: 150MHz
• Number Of Elements: 2
• Supply Current: 180mA
• Pll Input Freq (min): 12MHz
• Pll Input Freq (max): 16MHz
• Operating Supply Voltage (typ): 3.3V
• Operating Temp Range: 0C to 70C
• Package Type: SSOP
• Output Frequency Range: 24 to 150MHz
• Operating Supply Voltage (min): 3.135V
• Operating Supply Voltage (max): 3.465V
• Operating Temperature Classification: Commercial
• Pin Count: 48
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 9248DF-39LF

Notes:
1. All timing is referenced to the Internal CPUCLK (defined as inside the ICS9248 device.)
2. PCI_STOP# is an asynchronous input, and metastable conditions may exist. This signal is required to be synchronized
3. All other clocks continue to run undisturbed.
4. CPU_STOP# is shown in a high (true) state.
0277G—08/04/04
PCI_STOP# Timing Diagram
PCI_STOP# is an asynchronous input to the ICS9248-39. It is used to turn off the PCICLK (0:4) clocks for low power
operation. PCI_STOP# is synchronized by the ICS9248-39 internally. The minimum that the PCICLK (0:4) clocks are
enabled (PCI_STOP# high pulse) is at least 10 PCICLK (0:4) clocks. PCICLK (0:4) clocks are stopped in a low state
and started with a full high pulse width guaranteed. PCICLK (0:4) clock on latency cycles are only one rising PCICLK
clock off latency is one PCICLK clock.
inside the ICS9248.
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ICS9248-39