PI6C48533-01LE Pericom Semiconductor, PI6C48533-01LE Datasheet

IC CLOCK BUFFER 20-TSSOP

PI6C48533-01LE

Manufacturer Part Number
PI6C48533-01LE
Description
IC CLOCK BUFFER 20-TSSOP
Manufacturer
Pericom Semiconductor
Type
Fanout Buffer (Distribution), Multiplexerr
Datasheet

Specifications of PI6C48533-01LE

Number Of Circuits
1
Ratio - Input:output
2:4
Differential - Input:output
Yes/Yes
Input
CML, HCSL, LVDS, LVHSTL, LVPECL, SSTL
Output
LVPECL
Frequency - Max
800MHz
Voltage - Supply
3 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
20-TSSOP
Frequency-max
800MHz
Output Logic Level
LVPECL
Supply Voltage (max)
3.6 V
Supply Voltage (min)
3 V
Maximum Operating Temperature
+ 85 C
Max Output Freq
800 MHz
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Number Of Clock Inputs
2
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
• Pin-to-pin compatible to ICS8533-01
• Maximum operation frequency: 800MHz
• 4 pair of differential LVPECL outputs
• Selectable differential CLK and PCLK inputs
• CLK,
• PCLK, nPCLK pair supports LVPECL, CML and SSTL
• Output Skew: 100ps (maximum)
• Part-to-part skew: 150ps (maximum)
• Propagation delay: 2ns (maximum)
• 3.3V power supply
• Operating Temperature: -40
• Packaging (Pb-free & Green avaliable):
Block Diagram
CLK_SEL
SSTL and HCSL input level
input level
-20-pin TSSOP (L)
CLK_EN
n
PCLK
PCLK
n
CLK
CLK
09-0110
n
CLK pair accepts LVDS, LVPECL, LVHSTL,
0
1
o
C to 85
D
LE
o
C
Q
Q
n
Q
n
Q
n
Q
n
Q
Q
Q
Q
Differential/LVCMOS to LVPECL Fanout Buffer
0
1
2
3
0
1
2
3
1
Description
The PI6C48533-01 is a high-performance low-skew LVPECL fanout
buffer. PI6C48533-01 features two selectable differential inputs and
translates to four LVPECL ultra-low jitter outputs. The inputs can
also be confi gured to single-ended with external resistor bias circuit.
The CLK input accepts LPECL or LVDS or LVHSTL or SSTL or
HCSL signals, and PCLK input accepts LVPECL or SSTL or CML
signals. The outputs are synchronized with input clock during asyn-
chronous assertion/deassertion of CLK_EN pin. PI6C48533-01 is
ideal for differential to LVPECL translations and/or LVPECL clock
distribution. Typical clock translation and distribution applications
are data-communications and telecommunications.
Pin Diagram
CLK_SEL
CLK_EN
n
PCLK
PCLK
n
CLK
CLK
V
V
NC
NC
CC
EE
1
2
3
4
5
6
7
8
9
10
3.3V Low Skew 1-to-4
PI6C48533-01
20
19
18
17
16
15
14
13
12
11
Q
n
V
Q
n
Q
n
V
Q
n
PS8737B
Q
Q
Q
Q
CC
CC
0
1
2
3
0
1
2
3
12/15/09

Related parts for PI6C48533-01LE

PI6C48533-01LE Summary of contents

Page 1

... CLK_SEL 09-0110 Differential/LVCMOS to LVPECL Fanout Buffer Description The PI6C48533- high-performance low-skew LVPECL fanout buffer. PI6C48533-01 features two selectable differential inputs and translates to four LVPECL ultra-low jitter outputs. The inputs can also be confi gured to single-ended with external resistor bias circuit. The CLK input accepts LPECL or LVDS or LVHSTL or SSTL or HCSL signals, and PCLK input accepts LVPECL or SSTL or CML signals ...

Page 2

... LVCMOS/LVTTL level with 50KΩ pull-up Conditions (1) Selected Source CLK, CLK Diasbled: Low n PCLK, PCLK Disabled: Low n CLK, CLK Enabled n PCLK, PCLK Enabled n 2 3.3V Low Skew 1-to-4 Min. Typ. Max Outputs Diasbled: High Disabled: High Enabled Enabled PI6C48533-01 x Units pF KΩ PS8737B 12/15/09 ...

Page 3

... Single Ended to Differential Conditions Referenced to GND Referenced to GND Referenced to GND 3 3.3V Low Skew 1-to-4 Input to Output Mode None Inverting None Inverting None Inverting None Inverting Inverting Inverting Min. Typ. Max. 4.6 -0.5 V +0.5V CC -0.5 V +0.5V CC -65 150 PI6C48533-01 Polarity Units PS8737B 12/15/09 ...

Page 4

... Low Skew 1-to-4 Min. Typ. Max. 3.0 3.3 3.6 - 3.0V to 3.6V unless otherwise stated.) Min. Typ. Max -0.3 0.8 150 5 -5 -150 Min. Typ. Max. 5 150 = 0V -150 = 0V -5 0.15 1 +0.5 EE 0.85V +0.3V CC PI6C48533-01 Units Units +0 μA Units μ PS8737B 12/15/09 ...

Page 5

... Conditions (3) 20% - 80% 5 3.3V Low Skew 1-to-4 Min. Typ. Max. 5 150 = 0V -150 0.6 1.0 +0.3V 2V, unless otherwise stated below. CC Min. Typ. Max. 500 800 1.0 2.0 100 150 75 300 40 60 PI6C48533-01 Units μA -0.9 V -1.6 ) Units MHz PS8737B 12/15/09 ...

Page 6

... R2 might need to be adjusted to postion the V_REF in the center of the input voltage swing. For example, if the input clock swing is only 2.5V and V = 3.3V, V_REF should be 1.25V and R1/R2 = 0.609. CC Figure 2: Single-ended Signal Driving Differential Input 09-0110 Differential/LVCMOS to LVPECL Fanout Buffer V R1 Single Ended 1K Clock Input C1 R2 0.1μ 3.3V Low Skew 1-to-4 CC CLK nCLK PI6C48533- gener- CC PS8737B 12/15/09 ...

Page 7

... Ref: JEDEC MO-153F/AC Note: • For latest package info, please check: http://www.pericom.com/products/packaging/mechanicals.php (1,2) Ordering Information Ordering Code PI6C48533-01LE Notes: 1. Thermal characteristics can be found on the company web site at www.pericom.com/packaging Pb-free and Green Pericom Semiconductor Corporation • 1-800-435-2336 • www.pericom.com 09-0110 Differential/LVCMOS to LVPECL Fanout Buffer 4 ...

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