ICS853016AGLF IDT, Integrated Device Technology Inc, ICS853016AGLF Datasheet - Page 9

• Manufacturer Part Number: ICS853016AGLF
• Description: IC FANOUT BUFF LVPECL/ECL 8TSSOP
• Manufacturer: IDT, Integrated Device Technology Inc
• Series: HiPerClockS™r
• Type: Fanout Buffer (Distribution)r

Specifications of ICS853016AGLF

• Number Of Circuits: 1
• Ratio - Input:output: 1:2
• Differential - Input:output: Yes/Yes
• Input: CML, LVDS, LVPECL, SSTL
• Output: ECL, LVPECL
• Frequency - Max: 3GHz
• Voltage - Supply: 3 V ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 8-TSSOP
• Frequency-max: 3GHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 800-1160; 800-1160-5; 800-1160; 853016AGLF

This section provides information on power dissipation and junction temperature for the ICS853016.
Equations and example calculations are also provided.
1. Power Dissipation.
The total power dissipation for the ICS853016 is the sum of the core power plus the power dissipated in the load(s).
The following is the power dissipation for V
NOTE: Please refer to Section 3 for details on calculating power dissipated in the load.
2. Junction Temperature.
Junction temperature, Tj, is the temperature at the junction of the bond wire and bond pad and directly affects the reliability of the
device. The maximum recommended junction temperature for HiPerClockS
In order to calculate junction temperature, the appropriate junction-to-ambient thermal resistance
flow and a multi-layer board, the appropriate value is 112.7°C/W per Table 5A below.
Therefore, Tj for an ambient temperature of 85°C with all outputs switching is:
This calculation is only an example. Tj will obviously vary depending on the number of loaded outputs, supply voltage, air flow,
and the type of board (single layer or multi-layer).
IDT
T
T
ABLE
ABLE
ICS853016
LOW SKEW, 1-TO2, DIFFERENTIAL-TO-3.3V, 5V LVPECL/ECL FANOUT BUFFER
™
The equation for Tj is as follows: Tj =
Tj = Junction Temperature
Pd_total = Total Device Power Dissipation (example calculation is in section 1 above)
T
85°C + 0.227W * 112.7°C/W = 110.6°C. This is below the limit of 125°C.
/ ICS
Multi-Layer PCB, JEDEC Standard Test Boards
JA
A
Single-Layer PCB, JEDEC Standard Test Boards
Multi-Layer PCB, JEDEC Standard Test Boards
NOTE: Most modern PCB designs use multi-layered boards. The data in the second row pertains to most designs.
= Ambient Temperature
5A. T
5B. T
= Junction-to-Ambient Thermal Resistance
Power (core)
Power (outputs)
If all outputs are loaded, the total power is 2 * 30.94mW = 61.88mW
Total Power
™
3.3V, 5V LVPECL FANOUT BUFFER
HERMAL
HERMAL
R
MAX
R
_MAX
ESISTANCE
ESISTANCE
= V
MAX
(5.5V, with all outputs switching) = 165mW + 61.88mW = 226.88mW
= 30.94mW/Loaded Output pair
CC_MAX
* I
EE_MAX
JA
JA
FOR
FOR
= 5.5V * 30mA = 165mW
8-
8-
CC
JA
JA
PIN
PIN
JA
= 5.5V, which gives worst case results.
P
* Pd_total + T
by Velocity (Linear Feet per Minute)
TSSOP, F
by Velocity (Meters per Second)
SOIC, F
OWER
ORCED
ORCED
C
A
101.7°C/W
ONSIDERATIONS
153.3°C/W
112.7°C/W
C
C
ONVECTION
9
ONVECTION
0
0
TM
devices is 125°C.
128.5°C/W
103.3°C/W
90.5°C/W
200
1
ICS853016AM REV. B DECEMBER 6, 2007
115.5°C/W
89.8°C/W
JA
97.1°C/W
must be used. Assuming no air
500
2
PRELIMINARY