MC100LVEL14DWG ON Semiconductor, MC100LVEL14DWG Datasheet - Page 3

• Manufacturer Part Number: MC100LVEL14DWG
• Description: IC CLOCK DISTRIB ECL 1:5 20SOIC
• Manufacturer: ON Semiconductor
• Series: 100LVELr
• Type: Fanout Buffer (Distribution), Multiplexerr

Specifications of MC100LVEL14DWG

• Number Of Circuits: 1
• Ratio - Input:output: 2:5
• Differential - Input:output: Yes/Yes
• Input: ECL, PECL
• Output: ECL, PECL
• Frequency - Max: 1GHz
• Voltage - Supply: 3 V ~ 3.8 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 20-SOIC (7.5mm Width)
• Frequency-max: 1GHz
• Output Logic Level: ECL
• Supply Voltage (max): +/- 3.8 V
• Supply Voltage (min): +/- 3 V
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT
• Multiply / Divide Factor: 2:1
• Number Of Clock Inputs: 2
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: MC100LVEL14DWGOS

Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
Table 3. MAXIMUM RATINGS
V
V
V
I
I
T
T
q
q
T
Symbol
out
BB
Warning: All V
A
stg
JA
JC
sol
CC
EE
I
Q0
V
20
1
CC
Figure 1. Pinout (Top View) and Logic Diagram
to Power Supply to guarantee proper operation.
Q0
19
EN
2
PECL Mode Power Supply
NECL Mode Power Supply
PECL Mode Input Voltage
NECL Mode Input Voltage
Output Current
V
Operating Temperature Range
Storage Temperature Range
Thermal Resistance (Junction−to−Ambient)
Thermal Resistance (Junction−to−Case)
Wave Solder
BB
Q1
18
V
3
CC
CC
Sink/Source
and V
NC SCLK CLK CLK V
Q1
17
4
Q
D
EE
Q2
16
pins must be externally connected
5
Parameter
Q2
15
6
1 0
Q3
14
7
Q3
13
8
BB
Pb−Free
SEL V
Q4
12
Pb
9
http://onsemi.com
Q4
V
V
V
V
Continuous
Surge
0 lfpm
500 lfpm
Standard Board
<2 to 3 sec @ 248°C
<2 to 3 sec @ 260°C
11
10
EE
EE
CC
EE
CC
Condition 1
= 0 V
= 0 V
= 0 V
= 0 V
3
Table 1. PIN DESCRIPTION
Table 2. FUNCTION TABLE
*On next negative transition of CLK or SCLK
X = Don’t Care
CLK, CLK
SCLK
EN
SEL
Q
V
V
V
NC
BB
CC
EE
CLK
0−4,
H
X
X
X
L
Q
0−4
PIN
V
V
SOIC−20
SOIC−20
SOIC−20
I
I
v V
w V
Condition 2
SCLK
X
X
H
X
L
CC
EE
ECL Diff Clock Inputs
ECL Scan Clock Input
ECL Sync Enable
ECL Clock Select Input
ECL Diff Clock Outputs
Reference Voltage Output
Positive Supply
Negative Supply
No Connect
SEL
H
H
X
L
L
−65 to +150
FUNCTION
−40 to +85
30 to 35
Rating
−8 to 0
−6 to 0
8 to 0
6 to 0
± 0.5
100
265
265
50
90
60
EN
H
L
L
L
L
°C/W
°C/W
°C/W
Unit
mA
mA
mA
L*
Q
°C
°C
°C
H
H
L
L
V
V
V
V