PCK351D,118 NXP Semiconductors, PCK351D,118 Datasheet - Page 10

IC CLOCK DISTRIB 1:10 24SOIC

PCK351D,118

Manufacturer Part Number
PCK351D,118
Description
IC CLOCK DISTRIB 1:10 24SOIC
Manufacturer
NXP Semiconductors
Type
Fanout Buffer (Distribution)r
Datasheet

Specifications of PCK351D,118

Package / Case
24-SOIC (7.5mm Width)
Number Of Circuits
1
Ratio - Input:output
1:10
Differential - Input:output
No/No
Input
LVTTL
Output
LVTTL
Frequency - Max
125MHz
Voltage - Supply
3 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Frequency-max
125MHz
Number Of Outputs
10
Propagation Delay (max)
4.1 ns
Supply Voltage (max)
3.6 V
Supply Voltage (min)
3 V
Maximum Power Dissipation
650 mW
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
935271530118
PCK351D-T
PCK351D-T
Philips Semiconductors
PCK351_2
Product data sheet
Fig 7. Calculation of t
Output-to-output skew is the highest values of positive and negative edge skew:
t
Output pulse skew is the highest value of: t
Part-to-part skew t
several devices operating under identical conditions.
sk(o)
Y10 output
Y1 output
Y2 output
Y3 output
Y4 output
Y5 output
Y6 output
Y7 output
Y8 output
Y9 output
= t
A input
PLH(A-Yn)(max)
Rev. 02 — 16 December 2005
sk(o)
sk(pr)
t
, t
PLH(A-Yn)(min)
represents the positive and negative edge skew between outputs of
t
t
t
t
t
t
t
t
t
t
PHL(A-Y1)
PHL(A-Y2)
PHL(A-Y3)
PHL(A-Y4)
PHL(A-Y5)
PHL(A-Y6)
PHL(A-Y7)
PHL(A-Y8)
PHL(A-Y9)
PHL(A-Y10)
sk(p)
, and t
1 : 10 clock distribution device with 3-state outputs
and t
sk(pr)
t
t
t
t
t
t
t
t
t
t
PLH(A-Y1)
PLH(A-Y2)
PLH(A-Y3)
PLH(A-Y4)
PLH(A-Y5)
PLH(A-Y6)
PLH(A-Y7)
PLH(A-Y8)
PLH(A-Y9)
PLH(A-Y10)
sk(o)
sk(p)
= t
= t
PHL(A-Yn)(max)
PLH(A-Yn)
t
PHL(A-Yn)
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
t
PHL(A-Yn)(min)
.
.
002aaa286
PCK351
10 of 18

Related parts for PCK351D,118