NB3N551DG ON Semiconductor, NB3N551DG Datasheet - Page 4

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NB3N551DG

Manufacturer Part Number
NB3N551DG
Description
IC CLK FANOUT BUFFER 1:4 8-SOIC
Manufacturer
ON Semiconductor
Type
Fanout Buffer (Distribution)r
Datasheet

Specifications of NB3N551DG

Number Of Circuits
1
Ratio - Input:output
1:4
Differential - Input:output
No/No
Input
LVCMOS, LVTTL
Output
LVCMOS, LVTTL
Frequency - Max
180MHz
Voltage - Supply
3 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
8-SOIC (3.9mm Width)
Frequency-max
180MHz
Number Of Outputs
4
Max Input Freq
180 MHz
Propagation Delay (max)
6 ns @ 3V to 5.5V
Supply Voltage (max)
5.5 V
Supply Voltage (min)
3 V
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
NB3N551DG
NB3N551DGOS

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3. Outputs loaded with external R
4. Measured with rail−to−rail input clock.
5. Measured on rising edges at V
Table 5. DC CHARACTERISTICS
DC CHARACTERISTICS
Table 6. AC CHARACTERISTICS
V
V
V
V
Symbol
Symbol
Symbol
t
V
V
t
V
V
jitter (pd)
jitter
decoupling capacitor should be connected between V
if the trace is longer than 1 inch.
IH,
IH,
IL,
IL,
IH,
RPU
IH,
RPU
t
V
V
IL,
V
V
IL,
V
CIN
IOS
V
CIN
IOS
skew
I
I
ZO
ZO
t
t
DD
DD
f
r
OH
OH
OH
OH
pd
OL
OL
in
/t
I
I
I
I
OE
OE
CLK
CLK
OE
CLK
CLK
OE
(f)
f
Power Supply Current @ 135 MHz, No Load, V
Output HIGH Voltage – I
Output LOW Voltage – I
Output HIGH Voltage – I
Input HIGH Voltage, I
Input LOW Voltage, I
Input HIGH Voltage, OE
Input LOW Voltage, OE
Nominal Output Impedance
Input Pull−up Resistor, OE
Input Capacitance, OE
Short Circuit Current
Power Supply Current @ 135 MHz, No Load, V
Output HIGH Voltage – I
Output LOW Voltage – I
Output HIGH Voltage – I
Input HIGH Voltage, I
Input LOW Voltage, I
Input HIGH Voltage, OE
Input LOW Voltage, OE
Nominal Output Impedance
Input Pull−up Resistor, OE
Input Capacitance, OE
Short Circuit Current
Input Frequency
RMS Phase Jitter (Integrated 12 kHz − 20 MHz)
(See Figures 2 and 3)
Period Jitter (RMS, 1s)
Output rise and fall times; 0.8 V to 2.0 V
Propagation Delay, CLK to Qn, 0 − 180 MHz,
(Note 4)
Output−to−Output Skew; (Note 5)
(V
DD
Characteristic
DD
L
= 4.5 V to 5.5 V, GND = 0 V, T
CLK
CLK
= 33−W series resistor and C
CLK
CLK
÷ 2.
OL
OL
OH
OH
OH
OH
(V
(V
= 25 mA
= 35 mA
DD
DD
Characteristic
Characteristic
= −25 mA, V
= −12 mA (CMOS level)
= −35 mA
= −12 mA (CMOS level)
= 3.0 V to 3.6 V, GND = 0 V, T
= 3.0 V to 5.5 V, GND = 0 V, T
DD
DD
= 3.3 V
http://onsemi.com
and GND. A 33 W series terminating resistor may be used on each clock output
DD
DD
A
L
= 3.3 V
= 5.0 V
= 15 pF to GND for proper operation. Duty cycle out = duty in. A 0.01 mF
= −40°C to +85°C) (Note 3)
f
f
4
carrier
carrier
Conditions
A
A
= 25 MHz
= 50 MHz
= −40°C to +85°C) (Note 3)
= −40°C to +85°C) (Note 3)
(V
(V
V
V
DD
DD
DD
DD
Min
Min
Min
2.4
2.0
2.4
2.0
1.5
/2)+0.7
0
/2) + 1
0
− 0.4
– 0.4
± 50
Typ
220
Typ
220
±80
Typ
5.0
5.0
2.0
0.5
3.0
20
20
50
20
43
16
50
(V
(V
DD
DD
VDD
Max
Max
V
Max
180
160
0.4
3.8
0.8
0.4
5.5
0.8
1.0
6.0
40
95
/2)−0.7
/2) − 1
DD
Unit
Unit
Unit
MHz
mA
mA
mA
mA
kW
kW
pF
pF
ps
ns
ns
ps
W
W
fs
V
V
V
V
V
V
V
V
V
V
V
V
V
V

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