M48T58Y-70MH1F STMicroelectronics, M48T58Y-70MH1F Datasheet - Page 14

IC TIMEKPR SRAM 64KBIT 5V 28SOIC

M48T58Y-70MH1F

Manufacturer Part Number
M48T58Y-70MH1F
Description
IC TIMEKPR SRAM 64KBIT 5V 28SOIC
Manufacturer
STMicroelectronics
Series
Timekeeper®r
Type
Clock/Calendar/NVSRAMr
Datasheet

Specifications of M48T58Y-70MH1F

Memory Size
64K (8K x 8)
Time Format
HH:MM:SS (24 hr)
Date Format
YY-MM-DD-dd
Interface
Parallel
Voltage - Supply
4.5 V ~ 5.5 V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
28-SOIC, 28-SOH (8.48mm Width)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
497-4722-2
Data retention mode
5
Note:
14/33
Data retention mode
With valid V
RAM. Should the supply voltage decay, the RAM will automatically power-fail deselect, write
protecting itself when V
become high impedance, and all inputs are treated as “don't care.”
A power failure during a WRITE cycle may corrupt data at the currently addressed location,
but does not jeopardize the rest of the RAM's content. At voltages below V
user can be assured the memory will be in a write protected state, provided the V
is not less than t
into the deselect window during the time the device is sampling V
of the power supply lines is recommended.
When V
preserves data and powers the clock. The internal button cell will maintain data in the
M48T58/Y for an accumulated period of at least 7 years when V
system power returns and V
supply is switched to external V
plus t
inadvertent WRITE cycles prior to system stabilization. Normal RAM operation can resume
t
For more information on battery storage life refer to the application note AN1012.
rec
after V
rec
CC
(min). E1 should be kept high or E2 low as V
CC
drops below V
CC
exceeds V
applied, the M48T58/Y operates as a conventional BYTEWIDE™ static
F
. The M48T58/Y may respond to transient noise spikes on V
CC
PFD
SO
falls within the V
CC
, the control circuit switches power to the internal battery which
(max).
Doc ID 2412 Rev 7
rises above V
CC
. Write protection continues until V
PFD
SO
(max), V
, the battery is disconnected, and the power
CC
PFD
rises past V
(min) window. All outputs
CC
CC
is less than V
. Therefore, decoupling
CC
PFD
reaches V
M48T58, M48T58Y
(min) to prevent
PFD
CC
(min), the
CC
that reach
SO
PFD
. As
fall time
(min)

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