PCF2123BS/1,512 NXP Semiconductors, PCF2123BS/1,512 Datasheet - Page 17

• Manufacturer Part Number: PCF2123BS/1,512
• Description: IC CLOCK HVQFN16
• Manufacturer: NXP Semiconductors
• Type: Clock/Calendar/Alarmr

Specifications of PCF2123BS/1,512

• Package / Case: 16-VQFN Exposed Pad, 16-HVQFN, 16-SQFN, 16-DHVQFN
• Time Format: HH:MM:SS (12/24 hr)
• Date Format: YY-MM-DD-dd
• Interface: SPI, 3-Wire Serial
• Voltage - Supply: 1.1 V ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Function: Clock, Calendar, Alarm, Watchdog
• Supply Voltage (max): 5.5 V
• Supply Voltage (min): 1.1 V
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT
• Rtc Bus Interface: SPI
• Supply Current: 250 uA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Memory Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: 568-5051-5; 935286382512

NXP Semiconductors
PCF2123
Product data sheet
During read/write operations, the time counting circuits (memory locations 02h through
08h) are blocked.
This prevents
After this read/write access is completed, the time circuit is released again and any
pending request to increment the time counters that occurred during the read/write access
is serviced. A maximum of 1 request can be stored; therefore, all accesses must be
completed within 1 second (see
As a consequence of this method, it is very important to make a read or write access in
one go, that is, setting or reading seconds through to years should be made in one single
access. Failing to comply with this method could result in the time becoming corrupted.
As an example, if the time (seconds through to hours) is set in one access and then in a
second access the date is set, it is possible that the time may increment between the two
accesses. A similar problem exists when reading. A roll over may occur between reads
thus giving the minutes from one moment and the hours from the next. Therefore it is
advised to read all time and date registers in one access.
Fig 11. Access time for read/write operations
•
•
Faulty reading of the clock and calendar during a carry condition
Incrementing the time registers during the read cycle
chip enable
data bus
All information provided in this document is subject to legal disclaimers.
Rev. 4 — 22 December 2010
COMMAND
Figure
DATA
11).
DATA
t < 1 s
SPI Real time clock/calendar
DATA
PCF2123
© NXP B.V. 2010. All rights reserved.
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