ISL12029IV27AZ Intersil, ISL12029IV27AZ Datasheet - Page 6

IC RTC/CALENDAR EEPROM 14-TSSOP

ISL12029IV27AZ

Manufacturer Part Number
ISL12029IV27AZ
Description
IC RTC/CALENDAR EEPROM 14-TSSOP
Manufacturer
Intersil
Type
Clock/Calendar/Supervisor/EEPROMr
Datasheet

Specifications of ISL12029IV27AZ

Memory Size
4K (512 x 8)
Time Format
HH:MM:SS (12/24 hr)
Date Format
YY-MM-DD-dd
Interface
I²C, 2-Wire Serial
Voltage - Supply
2.7 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
14-TSSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Serial Interface (I
NOTES:
10. Bit BSW = 0 (Standard Mode), ATR = 00h, V
12. In order to ensure proper timekeeping, the V
13. Parameter is not 100% tested.
14. t
15. These are I
16. Compliance to datasheet limits is assured by one or more methods: production test, characterization and/or design.
11. Specified at +25°C.
7. IRQ/F
8. V
9. V
SYMBOL
t
t
t
t
t
t
HD:STO
HD:STA
SU:DAT
HD:DAT
SU:STO
SU:STA
t
Cpin
HIGH
Rpu
sequence of a serial interface Write operation, to the end of the self-timed internal non-volatile write cycle.
t
t
Cb
WC
WC
DH
t
t
IL
RESET
R
F
= V
is the minimum cycle time to be allowed for any non-volatile Write by the user, it is the time from valid STOP condition at the end of Write
OUT
DD
= 2.63V (VDD must be greater than V
Clock HIGH Time
START Condition Setup Time
START Condition Hold Time
Input Data Setup Time
Input Data Hold Time
STOP Condition Setup Time
STOP Condition Hold Time for
Read, or Volatile Only Write
Output Data Hold Time
SDA, and SCL Pin Capacitance
Non-Volatile Write Cycle Time
SDA and SCL Rise Time
SDA and SCL Fall Time
Capacitive Loading of SDA or SCL Total on-chip and off-chip
SDA and SCL Bus Pull-up Resistor
Off-chip
x 0.1, V
Inactive (no frequency output and no alarms).
2
C specific parameters and are not directly tested, however they are used during device testing to validate device specification.
IH
2
C) Specifications - DC/AC Characteristics
PARAMETER
= V
DD
x 0.9, f
6
SCL
= 400kHz.
BAT
DD SR-
Measured at the 70% of V
crossing.
SCL rising edge to SDA falling
edge. Both crossing 70% of V
From SDA falling edge crossing
30% of V
crossing 70% of V
From SDA exiting the 30% to
70% of V
edge crossing 30% of V
From SCL falling edge crossing
70% of V
30% to 70% of V
From SCL rising edge crossing
70% of V
crossing 30% of V
From SDA rising edge to SCL
falling edge. Both crossing 70%
of V
From SCL falling edge crossing
30% of V
30% to 70% of V
From 30% to 70% of V
From 70% to 30% of V
Maximum is determined by t
t
For Cb = 400pF, max is about
2kΩ~2.5kΩ.
For Cb = 40pF, max is about
15kΩ~20kΩ
RESET
F
.
≥ 1.8V.
DD
specification must be followed.
ISL12029, ISL12029A
), VBAT = 0V.
.
DD
DD
DD
DD
DD
CONDITIONS
, until SDA enters the
window, to SCL rising
, to SDA rising edge
to SCL falling edge
to SDA entering the
DD
DD
DD
DD
window.
window.
.
.
DD
DD
DD
DD
R
and
(Continued)
DD
.
(Note 16)
0.1 x Cb
0.1 x Cb
MIN
20 +
20 +
600
600
600
100
600
600
10
0
0
1
TYP
12
(Note 16)
MAX
250
250
400
10
20
UNITS
ms
ns
ns
ns
ns
ns
ns
ns
ns
pF
ns
ns
pF
December 16, 2010
NOTES
FN6206.10
14
15
15
15
15

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