AD9246BCPZ-125 Analog Devices Inc, AD9246BCPZ-125 Datasheet - Page 4

IC ADC 14BIT 125MSPS 48-LFCSP

AD9246BCPZ-125

Manufacturer Part Number
AD9246BCPZ-125
Description
IC ADC 14BIT 125MSPS 48-LFCSP
Manufacturer
Analog Devices Inc
Datasheet

Specifications of AD9246BCPZ-125

Data Interface
Serial, SPI™
Design Resources
Using AD8376 to Drive Wide Bandwidth ADCs for High IF AC-Coupled Appls (CN0002) Driving AD9233/46/54 ADCs in AC-Coupled Baseband Appls (CN0051)
Number Of Bits
14
Sampling Rate (per Second)
125M
Number Of Converters
3
Power Dissipation (max)
425mW
Voltage Supply Source
Single Supply
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
48-VFQFN, CSP Exposed Pad
Resolution (bits)
14bit
Sampling Rate
125MSPS
Input Channel Type
Differential, Single Ended
Supply Voltage Range - Analog
1.7V To 1.9V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AD9246-125EBZ - BOARD EVAL FOR 125MSPS AD9246AD9246-105EBZ - BOARD EVAL FOR 105MSPS AD9246
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AD9246BCPZ-125
Manufacturer:
ADI
Quantity:
222
AD9246
SPECIFICATIONS
DC SPECIFICATIONS
AVDD = 1.8 V; DRVDD = 2.5 V, maximum sample rate, 2 V p-p differential input, 1.0 V internal reference; AIN = −1.0 dBFS, DCS
enabled, unless otherwise noted.
Table 1.
Parameter
RESOLUTION
ACCURACY
TEMPERATURE DRIFT
INTERNAL VOLTAGE REFERENCE
INPUT REFERRED NOISE
ANALOG INPUT
REFERENCE INPUT RESISTANCE
POWER SUPPLIES
POWER CONSUMPTION
1
2
3
Measured with a low input frequency, full-scale sine wave, with approximately 5 pF loading on each output bit.
Input capacitance refers to the effective capacitance between one differential input pin and AGND. Refer to Figure 4 for the equivalent analog input structure.
Standby power is measured with a dc input, the CLK pin inactive (set to AVDD or AGND).
No Missing Codes
Offset Error
Gain Error
Differential Nonlinearity (DNL)
Integral Nonlinearity (INL)
Offset Error
Gain Error
Output Voltage Error (1 V Mode)
Load Regulation @ 1.0 mA
VREF = 1.0 V
Input Span, VREF = 1.0 V
Input Capacitance
Supply Voltage
Supply Current
DC Input
Sine Wave Input
Sine Wave Input
Standby Power
Power-Down Power
AVDD
DRVDD
IAVDD
IDRVDD
IDRVDD
1
1
1
(DRVDD = 1.8 V)
(DRVDD = 3.3 V)
3
1
1
(DRVDD = 1.8 V)
(DRVDD = 3.3 V)
2
1
1
Temp
Full
Full
Full
Full
Full
25°C
Full
25°C
Full
Full
Full
Full
25°C
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Min
14
1.7
1.7
AD9246BCPZ-80
Guaranteed
Typ
±0.3
±0.6
±0.4
±1.5
±15
±95
±5
7
1.3
2
8
6
1.8
2.5
138
7
12
248
261
288
40
1.8
Rev. A | Page 4 of 44
Max
±0.5
±4.7
±1.0
±5.0
±20
1.9
3.6
155
279
Min
14
1.7
1.7
AD9246BCPZ-105
Guaranteed
Typ
±0.3
±0.6
±0.4
±1.3
±15
±95
±5
7
1.3
2
8
6
1.8
2.5
178
9
16
320
337
373
40
1.8
Max
±0.8
±5.0
±1.0
±5.0
±35
1.9
3.6
194
350
Min
14
1.7
1.7
AD9246BCPZ-125
Guaranteed
Typ
±0.3
±0.6
±0.4
±1.5
±15
±95
±5
7
1.3
2
8
6
1.8
2.5
220
11
19
395
415
458
40
1.8
Max
±0.8
±4.2
±1.0
±5.0
±35
1.9
3.6
236
425
Unit
Bits
% FSR
% FSR
LSB
LSB
LSB
LSB
ppm/°C
ppm/°C
mV
mV
LSB rms
V p-p
pF
V
V
mA
mA
mA
mW
mW
mW
mW
mW

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