MAX11613EUA+ Maxim Integrated Products, MAX11613EUA+ Datasheet - Page 14

IC ADC SERIAL 12BIT 4CH 8-MSOP

MAX11613EUA+

Manufacturer Part Number
MAX11613EUA+
Description
IC ADC SERIAL 12BIT 4CH 8-MSOP
Manufacturer
Maxim Integrated Products
Datasheet

Specifications of MAX11613EUA+

Number Of Bits
12
Sampling Rate (per Second)
94.4k
Data Interface
I²C, Serial
Number Of Converters
1
Power Dissipation (max)
362mW
Voltage Supply Source
Single Supply
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
8-TSSOP, 8-MSOP (0.118", 3.00mm Width)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Low-Power, 4-/8-/12-Channel, I
12-Bit ADCs in Ultra-Small Packages
Table 2. Configuration Byte Format
Table 3. Channel Selection in Single-Ended Mode (SGL/DIF = 1)
1
2
14
CS3
For the MAX11612/MAX11613, CS3 and CS2 are internally set to 0. For the MAX11614/MAX11615, CS3 is internally set to 0.
When SEL1 = 1, a single-ended read of AIN3/REF (MAX11612/MAX11613) or AIN11/REF (MAX11616/MAX11617) is ignored; scan
stops at AIN2 or AIN10. This does not apply to the MAX11614/MAX11615 as each provides separate pins for AIN7 and REF.
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
(MSB)
______________________________________________________________________________________
1
BIT 7
REG
BIT
7
6
5
4
3
2
1
0
CS2
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
1
CS1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
SGL/DIF
SCAN1
SCAN1
SCAN0
NAME
BIT 6
REG
CS3
CS2
CS1
CS0
CS0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
AIN0
Register bit. 1 = setup byte (see Table 1), 0 = configuration byte.
Scan select bits. Two bits select the scanning configuration (Table 5). Default to 00 at power-up.
Channel select bits. Four bits select which analog input channels are to be used for conversion
(Tables 3 and 4). Default to 0000 at power-up. For the MAX11612/MAX11613, CS3 and CS2 are
internally set to 0. For the MAX11614/MAX11615, CS3 is internally set to 0.
1 = single-ended, 0 = differential (Tables 3 and 4). Defaults to 1 at power-up. See the Single-
Ended/Differential Input section.
+
SCAN0
BIT 5
AIN1
+
AIN2
+
BIT 4
AIN3
CS3
+
2
AIN4
+
AIN5
BIT 3
CS2
+
DESCRIPTION
RESERVED
RESERVED
RESERVED
RESERVED
AIN6
+
2
C,
AIN7
BIT 2
+
CS1
AIN8
+
AIN9 AIN10 AIN11
+
BIT 1
CS0
+
SGL/DIF
+
(LSB)
BIT 0
2
GND
-
-
-
-
-
-
-
-
-
-
-
-

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