MAX11613EUA+ Maxim Integrated Products, MAX11613EUA+ Datasheet - Page 20

• Manufacturer Part Number: MAX11613EUA+
• Description: IC ADC SERIAL 12BIT 4CH 8-MSOP
• Manufacturer: Maxim Integrated Products

Specifications of MAX11613EUA+

• Number Of Bits: 12
• Sampling Rate (per Second): 94.4k
• Data Interface: I²C, Serial
• Number Of Converters: 1
• Power Dissipation (max): 362mW
• Voltage Supply Source: Single Supply
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 8-TSSOP, 8-MSOP (0.118", 3.00mm Width)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

For a waveform perfectly reconstructed from digital sam-
ples, the theoretical maximum SNR is the ratio of the full-
scale analog input (RMS value) to the RMS quantization
error (residual error). The ideal, theoretical minimum ana-
log-to-digital noise is caused by quantization error only
and results directly from the ADC’s resolution (N Bits):
In reality, there are other noise sources besides quanti-
zation noise: thermal noise, reference noise, clock jitter,
etc. SNR is computed by taking the ratio of the RMS
signal to the RMS noise, which includes all spectral
components minus the fundamental, the first five har-
monics, and the DC offset.
Signal-to-noise plus distortion (SINAD) is the ratio of the
fundamental input frequency’s RMS amplitude to the
RMS equivalent of all other ADC output signals.
Effective number of bits (ENOB) indicates the global
accuracy of an ADC at a specific input frequency and
sampling rate. An ideal ADC’s error consists of quanti-
zation noise only. With an input range equal to the
ADC’s full-scale range, calculate the ENOB as follows:
Total harmonic distortion (THD) is the ratio of the RMS
sum of the input signal’s first five harmonics to the fun-
damental itself. This is expressed as:
Low-Power, 4-/8-/12-Channel, I
12-Bit ADCs in Ultra-Small Packages
20
______________________________________________________________________________________
SINAD dB
SNR
(
ENOB = (SINAD - 1.76)/6.02
MAX[dB]
)
Signal-to-Noise Plus Distortion
=
20
Total Harmonic Distortion
×
= 6.02
Effective Number of Bits
log
⎡
⎢
⎣
Signal-to-Noise Ratio
NoiseRMS THDRMS
dB

SignalRMS
N + 1.76
+
dB
⎤
⎥
⎦
where V
V
monics.
Spurious-free dynamic range (SFDR) is the ratio of the
RMS amplitude of the fundamental (maximum signal
component) to the RMS value of the next largest distor-
tion component.
PROCESS: BiCMOS
MAX11612
MAX11613
MAX11614
MAX11615
MAX11616
MAX11617
5
are the amplitudes of the 2nd- through 5th-order har-
THD
PART
1
=
is the fundamental amplitude, and V
20
2
CHANNELS
C,
INPUT
×
12
12
Spurious-Free Dynamic Range
4
4
8
8
log
⎛
⎜
⎜
⎝
⎛
⎜
⎝
REFERENCE
V
INTERNAL
2
2
4.096
2.048
4.096
2.048
4.096
2.048
Chip Information
+
(V)
Selector Guide
V
3
2
V
+
1
VOLTAGE
V
4.5 to 5.5
2.7 to 3.6
4.5 to 5.5
2.7 to 3.6
4.5 to 5.5
2.7 to 3.6
SUPPLY
4
2
(V)
+
2
V
5
through
2
(LSB)
⎞
⎟
⎠
INL
±1
±1
±1
±1
±1
±1
⎞
⎟
⎟
⎠