AD7927BRUZ Analog Devices Inc, AD7927BRUZ Datasheet - Page 11

IC ADC 12BIT 8CH 200KSPS 20TSSOP

AD7927BRUZ

Manufacturer Part Number
AD7927BRUZ
Description
IC ADC 12BIT 8CH 200KSPS 20TSSOP
Manufacturer
Analog Devices Inc
Datasheets

Specifications of AD7927BRUZ

Data Interface
DSP, MICROWIRE™, QSPI™, Serial, SPI™
Number Of Bits
12
Sampling Rate (per Second)
200k
Number Of Converters
1
Power Dissipation (max)
7.5mW
Voltage Supply Source
Single Supply
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
20-TSSOP (0.173", 4.40mm Width)
Resolution (bits)
12bit
Sampling Rate
200kSPS
Input Channel Type
Single Ended
Supply Voltage Range - Analog
2.7V To 5.25V
Supply Current
1.5mA
Number Of Elements
1
Resolution
12Bit
Architecture
SAR
Sample Rate
200KSPS
Input Polarity
Unipolar
Input Type
Voltage
Rated Input Volt
2.5/5V
Differential Input
No
Power Supply Requirement
Analog and Digital
Single Supply Voltage (typ)
3/5V
Single Supply Voltage (min)
2.7V
Single Supply Voltage (max)
5.25V
Dual Supply Voltage (typ)
Not RequiredV
Dual Supply Voltage (min)
Not RequiredV
Dual Supply Voltage (max)
Not RequiredV
Power Dissipation
7.5mW
Differential Linearity Error
-0.9LSB/1.5LSB
Integral Nonlinearity Error
±1LSB
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
20
Package Type
TSSOP
Input Signal Type
Single-Ended
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
EVAL-AD7927CBZ - BOARD EVALUATION FOR AD7927
Lead Free Status / Rohs Status
Compliant

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SHADOW REGISTER
The Shadow Register on the AD7927 is a 16-bit, write-only
register. Data is loaded from the DIN pin of the AD7927 on the
falling edge of SCLK. The data is transferred on the DIN line at
the same time that a conversion result is read from the part. This
requires 16 serial clock falling edges for the data transfer. The
information is clocked into the Shadow Register, provided that the
SEQ and SHADOW bits were set to 0,1, respectively, in the
previous write to the Control Register. MSB denotes the first bit
in the data stream. Each bit represents an analog input from
Channel 0 to Channel 7. Through programming the Shadow
Register, two sequences of channels may be selected, through
CS
CS
Figure 2 reflects the traditional operation of a multichannel ADC,
where each serial transfer selects the next channel for conversion.
In this mode of operation, the sequencer function is not used.
Figure 3 shows how to program the AD7927 to continuously
convert on a particular sequence of channels. To exit this mode
of operation and revert back to the traditional mode of operation
of a multichannel ADC (as outlined in Figure 2), ensure that the
WRITE bit = 1 and the SEQ = SHADOW = 0 on the next serial
transfer. Figure 4 shows how a sequence of consecutive chan-
nels can be converted on without having to program the Shadow
Register or write to the part on each serial transfer. Again, to exit
this mode of operation and revert back to the traditional mode
of operation of a multichannel ADC (as outlined in Figure 2),
ensure the WRITE bit = 1 and the SEQ = SHADOW = 0 on
the next serial transfer.
REV. 0
------------------SEQUENCE ONE-------------------------------------------------------SEQUENCE TWO-----------------------
MSB
V
IN
0
Figure 2. SEQ Bit = 0, SHADOW Bit = 0 Flowchart
V
IN
1 V
DOUT: CONVERSION RESULT FROM PREVIOUSLY
SELECTED CHANNEL A2–A0.
DIN: WRITE TO CONTROL REGISTER,
WRITE BIT = 1,
SELECT CODING, RANGE, AND POWER MODE.
SELECT A2–A0 FOR CONVERSION.
SEQ = SHADOW = 0
DIN: WRITE TO CONTROL REGISTER,
WRITE BIT = 1,
SELECT CODING, RANGE, AND POWER MODE.
SELECT CHANNEL A2–A0 FOR CONVERSION.
SEQ = SHADOW = 0
IN
2
DUMMY CONVERSION
DIN = ALL 1s
V
IN
3
POWER-ON
V
IN
4
V
IN
5
Table V. Shadow Register Bit Functions
V
IN
WRITE BIT = 1,
SEQ = SHADOW = 0
6
V
IN
7
–11–
V
IN
which the AD7927 will cycle with each consecutive conversion
after the write to the Shadow Register. Sequence One will be
performed first and then Sequence Two. If the user does not
wish to preform a second sequence option, then all 0s must be
written to the last eight LSBs of the Shadow Register. To select
a sequence of channels, the associated channel bit must be set for
each analog input. The AD7927 will continuously cycle through
the selected channels in ascending order, beginning with the
lowest channel, until a write operation occurs (i.e., the WRITE bit
is set to 1) with the SEQ and SHADOW bits configured in any
way except 1,0. (See Table IV.) The bit functions are outlined
in Table V.
0
CS
CS
CS
Figure 3. SEQ Bit = 0, SHADOW Bit = 1 Flowchart
V
IN
1
WRITE BIT = 0
V
IN
2
DOUT: CONVERSION RESULT FROM PREVIOUSLY
SELECTED CHANNEL A2–A0.
DIN: WRITE TO SHADOW REGISTER, SELECTING
WHICH CHANNELS TO CONVERT ON; CHANNELS
SELECTED NEED NOT BE CONSECUTIVE CHANNELS
CONTINUOUSLY
CONVERTS ON THE
SELECTED
SEQUENCE OF
CHANNELS
DIN: WRITE TO CONTROL REGISTER,
WRITE BIT = 1,
SELECT CODING, RANGE, AND POWER MODE.
SELECT CHANNEL A2–A0 FOR CONVERSION.
SEQ = 0 SHADOW = 1
WRITE BIT = 0
WRITE BIT = 0
V
IN
3
DUMMY CONVERSION
DIN = ALL 1s
V
POWER-ON
IN
4
CONTINUOUSLY
CONVERTS ON THE
SELECTED
SEQUENCE OF
CHANNELS BUT
WILL ALLOW RANGE,
CODING, AND SO ON,
TO CHANGE IN THE
CONTROL REGISTER
WITHOUT INTERRUPT-
ING THE SEQUENCE,
PROVIDED SEQ = 1
SHADOW = 0
WRITE BIT = 1,
SEQ = 1,
SHADOW = 0
V
WRITE BIT = 1
SEQ = 1 SHADOW = 0
IN
5
AD7927
V
IN
6
LSB
V
IN
7

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