AD7730LBRU Analog Devices Inc, AD7730LBRU Datasheet - Page 42

• Manufacturer Part Number: AD7730LBRU
• Description: IC ADC TRANSDUCER BRIDGE 24TSSOP
• Manufacturer: Analog Devices Inc

Specifications of AD7730LBRU

• Rohs Status: RoHS non-compliant
• Number Of Bits: 24
• Sampling Rate (per Second): 600
• Data Interface: DSP, Serial, SPI™
• Number Of Converters: 1
• Power Dissipation (max): 125mW
• Voltage Supply Source: Analog and Digital
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 24-TSSOP (0.173", 4.40mm Width)
• For Use With: EVAL-AD7730LEBZ - BOARD EVALUATION FOR AD7730EVAL-AD7730EBZ - BOARD EVAL FOR AD7730

AD7730/AD7730L
Bipolar Excitation of the Bridge
As mentioned previously, some applications will require that the
AD7730 handle inputs from a bridge that is excited by a bipolar
voltage. The number of applications requiring this are limited,
but with the addition of some external components the AD7730
is capable of handling such signals. Figure 25 outlines one ap-
proach to the problem.
The example shown is a dc-excited bridge that is driven from
The first is how to get the AD7730 to handle input voltages
near or below ground and the second is how to take the 10 V
excitation voltage which appears across the bridge and generate
a suitable reference voltage for the AD7730. The circuit of Figure
25 attempts to address these two issues simultaneously.
The AD7730’s analog and digital supplies can be split such that
AV
DGND can also be at separate potentials. The only stipulation
is that AV
In Figure 25, the DV
AGND to go down to –2.5 V with respect to system ground.
This means that all logic signals to the part must not exceed 3 V
with respect to system ground. The AV
with respect to system ground.
The bridge is excited with 10 V across its inputs. The output of
the bridge is biased around the midpoint of the excitation volt-
ages which in this case is system ground or 0 V. In order for the
common-mode voltage of the analog inputs to sit correctly, the
AGND of the AD7730 must be biased below system ground by
5 V supplies. In such a circuit, two issues must be addressed.
OUT+
ALL VOLTAGE VALUES ARE WITH
RESPECT TO SYSTEM GROUND.
DD
and DV
+5V
–5V
DD
IN–
IN+
or DV
DD
OUT–
can be at separate potentials and AGND and
5 k
5 k
DD
R1
R3
DD
must not exceed the AGND by 5.5 V.
R2
1 0 k
is operated at +3 V, which allows the
OR 1/2 OP213
OR 1/2 OP213
1/2 OP284
1/2 OP284
A1
A2
+5V
–5V
+5V
–5V
Figure 25. AD7730 with Bipolar Excitation of the Bridge
REF IN(+)
REF IN(–)
DD
AIN1(+)
AIN1(–)
AGND
AV
is operated at +2.5 V
DD
MUX
BUFFER
GROUND
6-BIT
DAC
SYSTEM
–42–
+/–
+
a minimum of 1.2 V. The 10 V excitation voltage must be re-
duced to 5 V before being applied as the reference voltage for
the AD7730.
The resistor string R1, R2 and R3, takes the 10 V excitation
voltage and generates differential voltage of nominally 5 V.
Amplifiers A1 and A2 buffer the resistor string voltages and
provide the AV
and REF IN(–) voltages for the AD7730. The differential
reference voltage for the part is +5 V. The AD7730 retains its
ratiometric operation with this reference voltage varying in sym-
pathy with the analog input voltage.
The values of the resistors in the resistor string can be changed
to allow a larger DV
R2 = 10 k and R3 = 7 k , the AV
become +3.5 V and –1.5 V respectively. This allows the AD7730
to be used with a +3.6 V DV
analog input range to be within the specified common-mode
range.
An alternate scheme to this is to generate the AV
voltages from regulators or Zener diodes driven from the +5 V
and –5 V supplies respectively. The reference voltage for the
part would be generated in the same manner as just outlined but
amplifiers A1 and A2 would not be required to buffer the volt-
ages as they are now only driving the reference pins of the
AD7730. However, care must be taken in this scheme to ensure
that the REF IN(+) voltage does not exceed AV
REF IN(–) voltage does not go below AGND.
DGND
PGA
AND CONTROL LOGIC
SERIAL INTERFACE
MICROCONTROLLER
POL
CALIBRATION
MODULATOR
SIGMA-DELTA A/D CONVERTER
SIGMA-
DELTA
DD
and AGND voltages as well as the REF IN(+)
RDY
DV
DD
DD
REGISTER BANK
+3V
PROGRAMMABLE
voltage. For example, if R1 = 3 k ,
AD7730
GENERATION
DIGITAL
FILTER
DD
CLOCK
RESET
voltage while still allowing the
DD
and AGND voltages
MCLK IN
MCLK OUT
SCLK
CS
DIN
STANDBY
SYNC
DOUT
DD
DD
and that the
and AGND
REV. A