MAX114EAG+ Maxim Integrated Products, MAX114EAG+ Datasheet - Page 9

IC ADC 8BIT 1MSPS 24-SSOP

MAX114EAG+

Manufacturer Part Number
MAX114EAG+
Description
IC ADC 8BIT 1MSPS 24-SSOP
Manufacturer
Maxim Integrated Products
Datasheet

Specifications of MAX114EAG+

Number Of Bits
8
Sampling Rate (per Second)
1M
Data Interface
Parallel
Number Of Converters
3
Power Dissipation (max)
40mW
Voltage Supply Source
Single Supply
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
24-SSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Besides the two standard write-read-mode options,
pipelined operation can be achieved by connecting
WR to RD (Figure 6). With CS low, driving WR and RD
low initiates a conversion and concurrently reads the
result of the previous conversion.
_____________Analog Considerations
Figures 7a, 7b, and 7c show typical reference connec-
tions. The voltages at REF+ and REF- set the ADC’s
analog input range (see Figure 10). The voltage at REF-
defines the input that produces an output code of all
zeros, and the voltage at REF+ defines the input that
produces an output code of all ones.
The internal resistance from REF+ to REF- can be as
low as 1kΩ, and current will flow through it even when
the MAX114/MAX118 are shut down. Figure 7d shows
how an N-channel MOSFET can be connected to REF-
Figure 7a. Power Supply as Reference
Figure 7b. External Reference, 4.096V Full Scale
+5V
4.7µF
+5V
4.7 F
0.1µF
0.1 F
_______________________________________________________________________________________
V
V
IN+
IN-
MX584
V
V
IN+
IN-
Pipelined Operation
REF+
REF-
IN_
GND
V
DD
C1
0.1µF
MAX114
MAX118
8-Bit ADCs with 1µA Power-Down
REF+
REF-
IN_
GND
V
DD
MAX114
MAX118
Reference
+5V, 1Msps, 4 & 8-Channel,
Figure 6. Pipelined Mode Timing (WR = RD) (MODE = 1)
Figure 7c. Input Not Referenced to GND
Figure 7d. An N-channel MOSFET switches off the reference
load during power-down
RD, WR
* CURRENT PATH MUST STILL
A0–A2
D0–D7
+5V
4.7µF
EXIST FROM V
INT
* IRML2402
CS
PWRDN
OLD DATA (N - 1)
0.1µF
ADDRESS
VALID (N)
+5V
t
IN-
ACQ
t
CSS
t
TO GND
AH
MAX874
t
WR
V
IN-
t
N-FET*
R*
t
IHWR
CSH
+2.5V
t
V
INTL
0.1µF
IN+
0.1µF
C1
3.3µF
0.1µF
t
VALID (N + 1)
t
ACQ
ID
ADDRESS
0.1µF
V
REF+
REF-
PWRDN
REF-
IN_
GND
V
REF+
DD
NEW DATA (N)
DD
MAX114
MAX118
MAX114
MAX118
9

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