AD5258BRMZ1 Analog Devices Inc, AD5258BRMZ1 Datasheet - Page 17

• Manufacturer Part Number: AD5258BRMZ1
• Description: IC POT DGTL I2C1K 64P 10MSOP
• Manufacturer: Analog Devices Inc

Specifications of AD5258BRMZ1

• Memory Type: Non-Volatile
• Temperature Coefficient: 200 ppm/°C Typical
• Taps: 64
• Resistance (ohms): 1K
• Number Of Circuits: 1
• Interface: I²C, 2-Wire Serial
• Voltage - Supply: 2.7 V ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 10-MSOP, Micro10™, 10-uMAX, 10-uSOP
• Resistance In Ohms: 1.00K
• End To End Resistance: 1kohm
• Resistance Tolerance: ± 30%
• No. Of Steps: 64
• Supply Voltage Range: 2.7V To 5.5V
• No. Of Pots: Single
• Control Interface: I2C
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AD5258EVAL - BOARD EVAL FOR AD5258 DGTL POT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

WRITE MODES
Table 8. Writing to RDAC Register
Table 9. Writing to EEPROM Register
The wiper’s default value, prior to programming the EEPROM, is midscale.
Table 10. Activating/Deactivating Software Write Protect
In order to activate the write protection mode, the WP bit in Table 10 must be logic high. In order to deactivate the write protection, the
command must be sent again except with the WP in logic zero state.
READ MODES
Read modes are referred to as traditional because the first two
bytes for all three cases are “dummy” bytes which function to
place the pointer towards the correct register. This is the reason
for the repeat start. In theory, this step can be avoided if the
user is interested in reading a register that was previously
Table 11. Traditional Readback of RDAC Register Value
Table 12. Traditional Readback of Stored EEPROM Value
STORE/RESTORE MODES
Table 13. Storing RDAC Value to EEPROM
S
Table 14. Restoring EEPROM to RDAC
S
S
S
S
S
S
7-Bit Device Address
7-Bit Device Address
7-Bit Device Address
7-Bit Device Address
Slave Address Byte
Slave Address Byte
(See Table 5)
(See Table 5)
Slave Address Byte
Slave Address Byte
(See Table 5)
(See Table 5)
7-Bit Device Address
7-Bit Device Address
7-Bit Device Address
(See Table 5)
(See Table 5)
(See Table 5)
Slave Address Byte
Slave Address Byte
Slave Address Byte
0 S A 1 1 0 0 0 0 0 0 S A P
0 S A 1 0 1 0 0 0 0 0 S A P
0 SA 0
0 SA 0
Instruction Byte
Instruction Byte
0
0
Instruction Byte
0
0
0
Instruction Byte
0
1
SA
SA
SA
0
0
0
0
0
0
0
0
0
0
0
1
0
0
0
1
0
Instruction Byte
Instruction Byte
Instruction Byte
0 SA S
0 SA S
Rev. 0 | Page 17 of 24
Repeat start
Repeat start
0
0
0
↑
↑
0
0
0
7-Bit Device Address
7-Bit Device Address
0
0
0
written to. For example, if the EEPROM was just written to,
then the user can skip the two dummy bytes and proceed
directly to the slave address byte followed by the EEPROM
readback data.
Slave Address Byte
Slave Address Byte
(See Table 5)
(See Table 5)
0
0
0
0
0
0
SA
SA
SA
X
X
0
X
X
1 SA X
1 SA X
0
D5
D5
0
Data Byte
Data Byte
Data Byte
D4
D4
0
X D5 D4 D3 D2 D1 D0 NA P
X D5 D4 D3 D2 D1 D0 NA P
Read Back Data
Read Back Data
D3
D3
0
D2
D2
0
D1
D1
0
WP SA
D0
D0
AD5258
SA
SA
P
P
P