X9259US24Z-2.7 Intersil, X9259US24Z-2.7 Datasheet - Page 8

• Manufacturer Part Number: X9259US24Z-2.7
• Description: IC XDCP QUAD 256TAP 50K 24-SOIC
• Manufacturer: Intersil
• Series: XDCP™r

Specifications of X9259US24Z-2.7

• Taps: 256
• Resistance (ohms): 50K
• Number Of Circuits: 4
• Temperature Coefficient: 300 ppm/°C Typical
• Memory Type: Non-Volatile
• Interface: I²C, 2-Wire Serial
• Voltage - Supply: 2.7 V ~ 5.5 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 24-SOIC (7.5mm Width)
• Resistance In Ohms: 50K
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Note:
Read Wiper Counter
Register
Write Wiper Counter Register
Read Data Register
Write Data Register
XFR Data Register to Wiper
Counter Register
XFR Wiper Counter Register to
Data Register
Global XFR Data Registers to Wiper
Counter Registers
Global XFR Wiper Counter
Registers to Data Register
Increment/Decrement Wiper
Counter Register
TABLE 3. IDENTIFICATION BYTE FORMAT
TABLE 4. INSTRUCTION BYTE FORMAT
TABLE 5. INSTRUCTION SET
(MSB)
(MSB)
ID3
I3
0
1/0 = data is one or zero
INSTRUCTION
ID2
I2
1
Device Type
Instruction
Identifier
Opcode
8
ID1
I1
0
I3
1
1
1
1
1
1
0
1
0
I2
0
0
0
1
1
1
0
0
0
ID0
I0
1
I1
1
0
1
0
0
1
0
0
1
INSTRUCTION SET
I0
1
0
1
0
1
0
1
0
0
RB
A3
Logic value of pins A3, A2, A1, and A0
RB
1/0
1/0
1/0
1/0
1/0
1/0
0
0
0
Selection
X9259
Register
RA
1/0
1/0
1/0
1/0
1/0
1/0
0
0
0
RA
A2
Slave Address
1/0
1/0
1/0
1/0
1/0
1/0
1/0
P1
0
0
1/0
1/0
1/0
1/0
1/0
1/0
1/0
P0
0
0
P1
A1
Read the contents of the Wiper Counter Register
pointed to by P1 - P0
Write new value to the Wiper Counter
Register pointed to by P1 - P0
Read the contents of the Data Register pointed to by
P1 - P0 and RB - RA
Write new value to the Data Register
pointed to by P1 - P0 and RB - RA
Transfer the contents of the Data Register pointed to
by P1 - P0 and RB - RA to its
associated Wiper Counter Register
Transfer the contents of the Wiper Counter Register
pointed to by P1 - P0 to the Data Register pointed to
by RB - RA
Transfer the contents of the Data Registers pointed to
by RB - RA of all four pots to their respective Wiper
Counter Registers
Transfer the contents of both Wiper Counter
Registers to their respective data Registers pointed to
by RB - RA of all four DCPs
Enable Increment/decrement of the Control Latch
pointed to by P1 - P0
(WCR Selection)
DCP Selection
(LSB)
(LSB)
P0
A0
OPERATION
April 13, 2007
FN8169.5