MCP4821-E/SN Microchip Technology, MCP4821-E/SN Datasheet - Page 16

• Manufacturer Part Number: MCP4821-E/SN
• Description: IC DAC 12BIT W/SPI 8SOIC
• Manufacturer: Microchip Technology

Specifications of MCP4821-E/SN

• Number Of Converters: 1
• Package / Case: 8-SOIC (3.9mm Width)
• Settling Time: 4.5µs
• Number Of Bits: 12
• Data Interface: Serial, SPI™
• Voltage Supply Source: Single Supply
• Operating Temperature: -40°C ~ 125°C
• Mounting Type: Surface Mount
• Resolution: 12 bit
• Interface Type: Serial (3-Wire, SPI, Microwire)
• Supply Voltage (max): 5.5 V
• Supply Voltage (min): 2.7 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Power Dissipation (max): -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

MCP4821/MCP4822
4.1
4.1.1
The DACs’ outputs are buffered with a low-power,
precision CMOS amplifier. This amplifier provides low
offset voltage and low noise. The output stage enables
the device to operate with output voltages close to the
power supply rails. Refer to Section 1.0 “Electrical
Characteristics” for range and load conditions.
In addition to resistive load-driving capability, the ampli-
fier will also drive high capacitive loads without oscilla-
tion. The amplifiers’ strong outputs allow V
used as a programmable voltage reference in a
system.
4.1.1.1
The rail-to-rail output amplifier has configurable gain,
allowing optimal full-scale outputs for differing voltage
reference inputs. The output amplifier gain has two
selections, a gain of 1 V/V (GA = 1) or a gain of 2 V/V
(GA = 0).
The output range is ideally 0.000V to 4095/4096 *
2.048V when G = 1, and 0.000 to 4095/4096 * 4.096V
when G = 2. The default value for this bit is a gain of 2,
yielding an ideal full-scale output of 0.000V to 4.096V
due to the internal 2.048V V
to-rail CMOS output buffer’s ability to approach AV
and V
output swing specification in Section 1.0 “Electrical
Characteristics” defines the range for a given load
condition.
4.1.2
The MCP482X devices utilize internal 2.048V voltage
reference. The voltage reference has low temperature
coefficient and low noise characteristics. Refer to
Section 1.0 “Electrical Characteristics” for the
voltage reference specifications.
4.1.3
The Power-On Reset (POR) circuit ensures that the
DACs power-up with SHDN = 0 (high-impedance). The
devices will continue to have a high-impedance output
until a valid Write command is performed to either of
the DAC registers and the LDAC pin meets the input
low threshold.
If the power supply voltage is less than the POR
threshold (V
in their reset state. They will remain in that state until
V
received.
Figure 4-3 shows a typical power supply transient
pulse and the duration required to cause a reset to
occur, as well as the relationship between the duration
and trip voltage. A 0.1 µF decoupling capacitor,
mounted as close as possible to the V
additional transient immunity.
DS21953A-page 16
DD
> V
DD
Circuit Descriptions
POR
establish practical range limitations. The
OUTPUT AMPLIFIERS
VOLTAGE REFERENCE
POWER-ON RESET CIRCUIT
POR
Programmable Gain Block
and a subsequent Write command is
= 2.0V, typical), the DACs will be held
REF
. Note that the near rail-
DD
pin, provides
OUT
to be
SS
FIGURE 4-3:
4.1.4
Shutdown mode can be entered by using either hard-
ware or software commands. The hardware pin
(SHDN) is only available on the MCP4821. During
Shutdown mode, the supply current is isolated from
most of the internal circuitry. The serial interface
remains active, thus allowing a Write command to
bring the device out of Shutdown mode. When the out-
put amplifiers are shut down, the feedback resistance
(typically 500 k
AV
the SHDN pin is brought high and a write command
with SD = 1 is latched into the device. When a DAC is
changed from Shutdown to Active mode, the output
settling time takes < 10 µs, but greater than the
standard Active mode settling time (4.5 µs).
SS
. The device will remain in Shutdown mode until
5V
SHUTDOWN MODE
10
8
6
4
2
0
Transients below the curve
will NOT cause a reset
produces a high-impedance path to
1
Typical Transient Response.
V
© 2005 Microchip Technology Inc.
Time
Transients above the curve
will cause a reset
DD
T
A
2
– V
= +25°C
Transient Duration
POR
V
DD
3
(V)
- V
POR
4
V
POR
5