CY8C5246AXI-054 Cypress Semiconductor Corp, CY8C5246AXI-054 Datasheet - Page 3

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CY8C5246AXI-054

Manufacturer Part Number
CY8C5246AXI-054
Description
Manufacturer
Cypress Semiconductor Corp
Datasheets

Specifications of CY8C5246AXI-054

Lead Free Status / Rohs Status
Compliant
1. Architectural Overview
Introducing the CY8C52 family of ultra low power, flash Programmable System-on-Chip (PSoC
PSoC
around a CPU subsystem. The combination of a CPU with a very flexible analog subsystem, digital subsystem, routing, and I/O
enables a high level of integration in a wide variety of consumer, industrial, and medical applications.
Document Number: 001-55034 Rev. *F
0. 5 to 5.5V
( Optional )
32.768 KHz
( Optional )
( Optional )
4- 33 MHz
®
3 and 32-bit PSoC 5 platform. The CY8C52 family provides configurable blocks of analog, digital, and interconnect circuitry
SYSTEM WIDE
RESOURCES
Clocking System
Power Management
Xtal
Osc
IMO
1.8V LDO
POR and
Power
System
Timer
Wake
Sleep
LVD
SMP
WDT
RTC
ILO
and
PRELIMINARY
Figure 1-1. Simplified Block Diagram
EEPROM
8- Bit
Timer
I 2C Slave
Digital Interconnect
UART
EMIF
Temperature
LCD Direct
UDB
UDB
UDB
UDB
CapSense
MEMORY SYSTEM
Drive
Sensor
Universal Digital Block Array (24 x UDB)
Quadrature Decoder
8- Bit SPI
UDB
UDB
UDB
UDB
FLASH
SRAM
12- Bit SPI
12- Bit PWM
Logic
DAC
UDB
UDB
UDB
UDB
16- Bit
PWM
SYSTEM BUS
DIGITAL SYSTEM
16- Bit PRS
8- Bit
Timer
UDB
UDB
UDB
PSoC
UDB
Analog Interconnect
Logic
Cortex M3 CPU
ANALOG SYSTEM
Controller
8051 or
Cache
UDB
UDB
UDB
UDB
ADC
SAR
ADC
CPU SYSTEM
®
5: CY8C52 Family Data Sheet
UDB
UDB
UDB
UDB
Controller
Interrupt
PHUB
DMA
Counter
PWM
Timer
4 x
®
CAN
2.0
) devices, part of a scalable 8-bit
CMP
4 x
Program &
Debug
Program
Boundary
Debug &
+
-
-
Trace
Scan
FS USB
Master /
Slave
I2C
2.0
PHY
USB
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