LP3929TME-AACQ National Semiconductor, LP3929TME-AACQ Datasheet

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LP3929TME-AACQ

Manufacturer Part Number
LP3929TME-AACQ
Description
Manufacturer
National Semiconductor
Datasheet

Specifications of LP3929TME-AACQ

Operating Temperature (max)
85C
Pin Count
24
Mounting
Surface Mount
Lead Free Status / Rohs Status
Not Compliant
© 2007 National Semiconductor Corporation
LP3929
High Speed Bi-Directional Level Shifter and Ultra Low-
Dropout CMOS Voltage Regulator and Line Protection
General Description
The LP3929 is designed for portable and wireless applica-
tions requiring level translation and power supply generation
in a compact footprint.
The device level translates 1.8 V LVCMOS on the host (A)
side to 2.85 V LVCMOS levels on the card (B) side for a min-
iSD / SD 4-bit bi-directional data bus.
Independent direct control of the CMD, Data0 and Data1-3
paths support mini SD state machine requirements. A shut-
down pin is provided for the level shifters and regulator. The
f_CLK_A is a feedback clock to the host which can be used
to overcome level shifter bus delay.
The built-in low-dropout voltage regulator is ideal for mobile
phone and battery powered wireless applications. It provides
up to 200 mA from a 3.05 V to 5.5 V input. It is stable with
small 1.0 µF ±30% ceramic and high quality tantalum output
capacitors, requiring smallest possible PC board area.
The card (B port) side channels have integration of ASIP (Ap-
plication Specific Integrated Passives) - on chip integrated
pull-up, pull-down, series resistors and capacitors for EMC
filtering. It is designed to tolerate IEC61000-4-2 level 4 ESD:
±15 kV air discharge, ±8 kV direct contact.
Typical Application Circuit
201868
Key Specifications
Level Shifter:
Low-Dropout Regulator:
Protection Block (B Side):
Features
6-signal Level Shifter (5 bi-directional and 1 uni-direction)
3 ns (typ) propagation delay
Channel-to-channel skew < 1 ns (max)
3.05 V to 5.5 V input range
2.85 V at 200 mA
Fast Turn-On time: 30 µs (typ)
110 mV (max) dropout with 200 mA load
Thermal shutdown at 160°C (typ)
Robust IEC ESD Protection: ±15 kV Air Gap, ±8 kV Direct
Contact
ASIP / EMI Filtering
Ultra small micro SMD 24 bump package
6-signal level translation 1.8 V to 2.85 V
LDO stable with ceramic and high quality tantalum
capacitors
December 14, 2007
20186801
www.national.com

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LP3929TME-AACQ Summary of contents

Page 1

... Specific Integrated Passives chip integrated pull-up, pull-down, series resistors and capacitors for EMC filtering designed to tolerate IEC61000-4-2 level 4 ESD: ±15 kV air discharge, ±8 kV direct contact. Typical Application Circuit © 2007 National Semiconductor Corporation Key Specifications Level Shifter: ■ 6-signal Level Shifter (5 bi-directional and 1 uni-direction) ■ ...

Page 2

Block Diagram www.national.com 20186802 2 ...

Page 3

... Output Voltage Grade LP3929 Supplied As 250 Units, Tape & Reel 2.85 V STD LP3929TME-AACQ Tape and Reel Information Note: The actual physical placement of the package marking will vary from part to part. The package marking “XY” will designate the date code. The “TT” NSC internal code for die traceability ...

Page 4

Pin Descriptions micro SMD Pin Name Port / Direction Bump Identifier D0_A D1 Host / Bidirectional D1_A E1 Host / Bidirectional D2_A A1 Host / Bidirectional D3_A B1 Host / Bidirectional CMD_A D2 Host / Bidirectional CLK_A C1 fCLK_A E2 ...

Page 5

Inputs EN CMD_DIR DIR_0 DIR_1 ...

Page 6

... Absolute Maximum Ratings If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications. Supply Voltage (V ) BAT Supply Voltage (V ) DDA LVCMOS A Port Input Voltage LVCMOS A Port I/O Voltage LVCMOS A Port I/O Voltage Junction Temperature Storage Temperature ...

Page 7

Electrical Characteristics Typical values and limits appearing in standard typeface apply for T entire ambient temperature range for operation, −30°C to +85°C. (Notes 3, 4) Symbol Parameter Supply Current I Supply Current DD I Supply Current — Shutdown DDZ C ...

Page 8

... Note 11: Range of capacitor ESR values for which the device will remain stable. This electrical specification is guaranteed by design. Note 12: The built-in thermal shut-down of the LDO is also used to put all A and B outputs in tri-state mode. Note 13: Additional information on lead temperature and pad temperature can be found in National Semiconductor Application Note (AN-1112). Note 14: Unused inputs must be terminated. ...

Page 9

FIGURE Timing Diagram (propagation delay, skew) FIGURE 2. Output Transition Time (A and B Side) 9 20186805 20186806 www.national.com ...

Page 10

Typical Performance Characteristics 1 µ BAT DDA ASIP / EMI Filter Response www.national.com FIGURE Direction (37 MHz Example) Unless otherwise specified 25°C. A Power Supply ...

Page 11

... CMOS RAM keep-alive applica- tions. MICRO SMD ASSEMBLY For assembly recommendations of micro SMD package please refer to National Semiconductor Application Note AN-1112. MICRO SMD LIGHT SENSITIVITY Exposing the micro SMD device to direct sunlight will cause misoperation of the device. Light sources such as Halogen lamps can effect electrical performance if brought near to the device ...

Page 12

Physical Dimensions www.national.com inches (millimeters) unless otherwise noted micro SMD, 24 Bump NS Package Number: TME24AAA The dimensions for X1, X2 and X3 are as follows 2.015mm ± 30μ 2.015mm ± 30μ 0.600mm ± ...

Page 13

Notes 13 www.national.com ...

Page 14

... For more National Semiconductor product information and proven design tools, visit the following Web sites at: Products Amplifiers www.national.com/amplifiers Audio www.national.com/audio Clock Conditioners www.national.com/timing Data Converters www.national.com/adc Displays www.national.com/displays Ethernet www.national.com/ethernet Interface www.national.com/interface LVDS www.national.com/lvds Power Management www.national.com/power Switching Regulators www.national.com/switchers LDOs www ...

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