LC51024MV-52F484C Lattice, LC51024MV-52F484C Datasheet - Page 39

• Manufacturer Part Number: LC51024MV-52F484C
• Manufacturer: Lattice

ispXPLD 5000MX Family Internal Switching Characteristics (Continued)
Lattice Semiconductor
t
t
t
t
t
t
t
t
t
t
t
t
t
t
1. The PT-delay to clock of RAM/FIFO/CAM should be t
2. The PT-delay to set/reset of RAM/FIFO/CAM should be t
DPCEBS
DPCEBH
DPADDBS
DPADDBH
DPRWBS
DPRWBH
DPDATABS
DPDATABH
DPRCLKAO
DPRCLKBO
DPCLKSKEW
DPRSTO
DPRSTR
DPRSTPW
Parameter
Clock Enable B
Setup before Clock
B Time
Clock Enable Hold
B after Clock B
Time
Address B Setup
before Clock B Time
Address B Hold
time after Clock B
Time
R/W B Setup before
Clock B Time
R/W B Hold time
after Clock B Time
Write Data B Setup
before Clock B Time
Write Data B Hold
after Clock B Time
Read Clock A to
Output Delay
Read Clock B to
Output Delay
Opposite Clock
Cycle Delay
Reset to RAM
Output Delay
Reset Recovery
Time
Reset Pulse Width
Description
Over Recommended Operating Conditions
Parameter
Base
—
—
—
—
—
—
—
—
—
—
—
—
—
—
BCLK
-2.95
-0.27
-0.01
-0.27
-0.01
-0.27
-0.01
Min. Max. Min. Max. Min. Max. Min. Max. Min. Max.
2.33
1.40
1.20
0.14
BSR
—
—
—
instead of t
instead of t
-4
5.97
5.16
3.30
—
—
—
—
—
—
—
—
—
—
—
39
PTCLK.
-2.95
-0.27
-0.01
-0.27
-0.01
-0.27
-0.01
2.33
1.40
1.20
0.14
PTSR.
—
—
—
-45
5.92
5.16
3.30
—
—
—
—
—
—
—
—
—
—
—
ispXPLD 5000MX Family Data Sheet
-2.95
-0.27
-0.01
-0.27
-0.01
-0.27
-0.01
2.33
1.40
1.20
0.14
—
—
—
-5
5.86
5.16
3.30
—
—
—
—
—
—
—
—
—
—
—
-2.95
-0.27
-0.01
-0.27
-0.01
-0.27
-0.01
2.33
1.40
1.20
0.14
—
—
—
-52
5.65
5.16
3.30
—
—
—
—
—
—
—
—
—
—
—
-2.27
-0.21
-0.01
-0.21
-0.01
-0.21
-0.01
3.03
1.83
1.56
0.19
—
—
—
-75
9.86
6.71
4.29
—
—
—
—
—
—
—
—
—
—
—
Timing v.1.8
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns