DSPB56362AG120 Freescale Semiconductor, DSPB56362AG120 Datasheet - Page 60

• Manufacturer Part Number: DSPB56362AG120
• Description: IC DSP 24BIT AUD 120MHZ 144-LQFP
• Manufacturer: Freescale Semiconductor
• Series: Symphony™r
• Type: Audio Processorr

Specifications of DSPB56362AG120

• Interface: Host Interface, I²C, SAI, SPI
• Clock Rate: 120MHz
• Non-volatile Memory: ROM (126 kB)
• On-chip Ram: 42kB
• Voltage - I/o: 3.30V
• Voltage - Core: 3.30V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 144-LQFP
• Device Core Size: 24b
• Architecture: Modified Harvard
• Format: Fixed Point
• Clock Freq (max): 120MHz
• Mips: 120
• Device Input Clock Speed: 120MHz
• Ram Size: 42KB
• Program Memory Size: 90KB
• Operating Supply Voltage (typ): 3.3V
• Operating Supply Voltage (min): 3.14V
• Operating Supply Voltage (max): 3.46V
• Operating Temp Range: -40C to 105C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 144
• Package Type: LQFP
• Product: DSPs
• Data Bus Width: 24 bit
• Processor Series: DSP563xx
• Core: 56000
• Numeric And Arithmetic Format: Fixed-Point
• Instruction Set Architecture: Modified Harvard
• Device Million Instructions Per Second: 120 MIPS
• Maximum Clock Frequency: 120 MHz
• Program Memory Type: Flash
• Data Ram Size: 42 KB
• Operating Supply Voltage: 3.3 V
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Interface Type: SPI, I2C, ESAI, SHI
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

External Memory Expansion Port (Port A)
3-34
Table 3-16 DRAM Out-of-Page and Refresh Timings, Fifteen Wait States 100 and 120MHz
No.
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
CAS deassertion to data not valid (read hold
time)
RAS deassertion to RAS assertion
RAS assertion pulse width
CAS assertion to RAS deassertion
RAS assertion to CAS deassertion
CAS assertion pulse width
RAS assertion to CAS assertion
RAS assertion to column address valid
CAS deassertion to RAS assertion
CAS deassertion pulse width
Row address valid to RAS assertion
RAS assertion to row address not valid
Column address valid to CAS assertion
CAS assertion to column address not valid
RAS assertion to column address not valid
Column address valid to RAS deassertion
WR deassertion to CAS assertion
CAS deassertion to WR
RAS deassertion to WR
CAS assertion to WR deassertion
RAS assertion to WR deassertion
WR assertion pulse width
WR assertion to RAS deassertion
WR assertion to CAS deassertion
Data valid to CAS assertion (write)
Characteristics
4
4
assertion
assertion
3
DSP56362 Technical Data, Rev. 4
Symbol
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
WCH
WCR
t
t
RSH
CSH
RCD
RAD
CRP
t
RAH
CAH
RCS
RCH
RRH
RWL
CWL
OFF
RAS
CAS
ASR
ASC
t
RAL
t
WP
RP
CP
AR
DS
15.75 × T
14.25 × T
6.25 × T
9.75 × T
6.25 × T
8.25 × T
4.75 × T
7.75 × T
6.25 × T
6.25 × T
2.75 × T
0.75 × T
6.25 × T
9.75 × T
1.75 × T
0.25 × T
15.5 × T
8.75 × T
9.5 × T
Expression
2.75 × T
3.5 × T
7 × T
5 × T
6 × T
0.0
C
C
C
C
C
C
C
C
C
C
C
C
C
C
C
C
C
C
C
C
C
− 4.0
− 3.8
− 4.2
C
C
C
− 4.2
− 4.0
− 4.0
− 4.0
− 4.0
− 4.0
− 4.0
− 4.0
− 4.0
− 4.0
− 4.0
− 4.0
− 4.0
− 3.7
− 2.0
− 4.5
− 4.0
± 2
− 4.3
− 4.3
± 2
150.5
153.2
138.2
90.8
Min
58.5
93.5
58.5
78.5
43.5
33.0
25.5
73.5
58.5
58.5
23.5
58.5
93.5
66.0
46.2
13.8
55.8
83.5
0.0
3.5
0.5
100 MHz
Max
37.0
29.5
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
Freescale Semiconductor
124.7
126.9
114.4
Min
48.1
77.2
48.1
64.7
35.6
27.2
20.9
60.6
48.1
48.1
18.9
48.1
77.2
54.3
37.9
10.9
45.8
75.0
68.9
0.0
2.2
0.1
120 MHz
1, 2
(continued)
Max
31.2
24.9
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns