EP2C35U484I8N Altera, EP2C35U484I8N Datasheet - Page 85

IC CYCLONE II FPGA 33K 484-UBGA

EP2C35U484I8N

Manufacturer Part Number
EP2C35U484I8N
Description
IC CYCLONE II FPGA 33K 484-UBGA
Manufacturer
Altera
Series
Cyclone® IIr
Datasheet

Specifications of EP2C35U484I8N

Number Of Logic Elements/cells
33216
Number Of Labs/clbs
2076
Total Ram Bits
483840
Number Of I /o
322
Voltage - Supply
1.15 V ~ 1.25 V
Mounting Type
Surface Mount
Operating Temperature
-40°C ~ 100°C
Package / Case
484-UBGA
For Use With
P0301 - DE2 CALL FOR ACADEMIC PRICING544-1733 - PCI KIT W/CYCLONE II EP2C35N
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Gates
-
Other names
544-2115

Available stocks

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Part Number
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Quantity
Price
Part Number:
EP2C35U484I8N
Manufacturer:
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Part Number:
EP2C35U484I8N
Manufacturer:
ALTERA
0
Hot-Socketing
Feature
Implementation
in Cyclone II
Devices
Altera Corporation
February 2007
the power supply can provide current to the device’s V
planes. This condition can lead to latch-up and cause a low-impedance
path from V
a large amount of current, possibly causing electrical damage.
Altera has ensured by design of the I/O buffers and hot-socketing
circuitry, that Cyclone II devices are immune to latch-up during hot
socketing.
The hot-socketing feature turns off the output buffer during power up
(either V
generates an internal HOTSCKT signal when either V
below the threshold voltage. Designs cannot use the HOTSCKT signal for
other purposes. The HOTSCKT signal cuts off the output buffer to ensure
that no DC current (except for weak pull-up leakage current) leaks
through the pin. When V
even after the internal POR signal (not available to the FPGA fabric used
by customer designs) is released and the configuration is finished. The
CONF_DONE, nCEO, and nSTATUS pins fail to respond, as the output
buffer cannot drive out because the hot-socketing circuitry keeps the I/O
pins tristated at this low V
has been removed on these configuration output or bidirectional pins to
ensure that they are able to operate during configuration. These pins are
expected to drive out during power-up and power-down sequences.
Each I/O pin has the circuitry shown in
CCINT
CC
or V
to ground within the device. As a result, the device extends
CCIO
supplies) or power down. The hot-socket circuit
CC
CC
ramps up slowly, V
voltage. Therefore, the hot-socketing circuit
Cyclone II Device Handbook, Volume 1
Figure
Hot Socketing & Power-On Reset
CC
4–1.
is still relatively low
CCINT
CC
and ground
or V
CCIO
is
4–3

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