EP1C20F324I7 Altera, EP1C20F324I7 Datasheet - Page 20

• Manufacturer Part Number: EP1C20F324I7
• Description: IC CYCLONE FPGA 20K LE 324-FBGA
• Manufacturer: Altera
• Series: Cyclone®r

Specifications of EP1C20F324I7

• Number Of Logic Elements/cells: 20060
• Number Of Labs/clbs: 2006
• Total Ram Bits: 294912
• Number Of I /o: 233
• Voltage - Supply: 1.425 V ~ 1.575 V
• Mounting Type: Surface Mount
• Operating Temperature: -40°C ~ 100°C
• Package / Case: 324-FBGA
• Family Name: Cyclone®
• Number Of Logic Blocks/elements: 20060
• # I/os (max): 233
• Frequency (max): 320.1MHz
• Process Technology: 0.13um (CMOS)
• Operating Supply Voltage (typ): 1.5V
• Logic Cells: 20060
• Ram Bits: 294912
• Operating Supply Voltage (min): 1.425V
• Operating Supply Voltage (max): 1.575V
• Operating Temp Range: -40C to 100C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 324
• Package Type: FBGA
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Number Of Gates: -
• Lead Free Status / Rohs Status: Not Compliant
• Other names: 544-1041

Cyclone Device Handbook, Volume 1
Figure 2–9. R4 Interconnect Connections
Notes to
(1)
(2)
2–14
Preliminary
C4 interconnects can drive R4 interconnects.
This pattern is repeated for every LAB in the LAB row.
Figure
2–9:
R4 Interconnect
Driving Left
The column interconnect operates similarly to the row interconnect. Each
column of LABs is served by a dedicated column interconnect, which
vertically routes signals to and from LABs, M4K memory blocks, and row
and column IOEs. These column resources include:
■
■
■
Cyclone devices include an enhanced interconnect structure within LABs
for routing LE output to LE input connections faster using LUT chain
connections and register chain connections. The LUT chain connection
allows the combinatorial output of an LE to directly drive the fast input
of the LE right below it, bypassing the local interconnect. These resources
can be used as a high-speed connection for wide fan-in functions from
LE 1 to LE 10 in the same LAB. The register chain connection allows the
register output of one LE to connect directly to the register input of the
next LE in the LAB for fast shift registers. The Quartus II Compiler
automatically takes advantage of these resources to improve utilization
and performance.
interconnects.
LUT chain interconnects within a LAB
Register chain interconnects within a LAB
C4 interconnects traversing a distance of four blocks in an up and
down direction
Adjacent LAB can
Drive onto Another
LAB's R4 Interconnect
Neighbor
LAB
Figure 2–10
Primary
LAB (2)
C4 Column Interconnects (1)
shows the LUT chain and register chain
Neighbor
LAB
R4 Interconnect
Driving Right
Altera Corporation
May 2008