EP1C12F256C6 Altera, EP1C12F256C6 Datasheet - Page 46

IC CYCLONE FPGA 12K LE 256-FBGA

EP1C12F256C6

Manufacturer Part Number
EP1C12F256C6
Description
IC CYCLONE FPGA 12K LE 256-FBGA
Manufacturer
Altera
Series
Cyclone®r
Datasheet

Specifications of EP1C12F256C6

Number Of Logic Elements/cells
12060
Number Of Labs/clbs
1206
Total Ram Bits
239616
Number Of I /o
185
Voltage - Supply
1.425 V ~ 1.575 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
256-FBGA
Family Name
Cyclone®
Number Of Logic Blocks/elements
12060
# I/os (max)
185
Frequency (max)
405.2MHz
Process Technology
0.13um (CMOS)
Operating Supply Voltage (typ)
1.5V
Logic Cells
12060
Ram Bits
239616
Operating Supply Voltage (min)
1.425V
Operating Supply Voltage (max)
1.575V
Operating Temp Range
0C to 85C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
256
Package Type
FBGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Number Of Gates
-
Lead Free Status / Rohs Status
Not Compliant
Other names
544-1788
EP1C12F256C6

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0
Cyclone Device Handbook, Volume 1
2–40
Preliminary
Figure 2–27. Cyclone IOE Structure
Note to
(1)
The IOEs are located in I/O blocks around the periphery of the Cyclone
device. There are up to three IOEs per row I/O block and up to three IOEs
per column I/O block (column I/O blocks span two columns). The row
I/O blocks drive row, column, or direct link interconnects. The column
I/O blocks drive column interconnects.
I/O block connects to the logic array.
I/O block connects to the logic array.
There are two paths available for combinatorial inputs to the logic array. Each path
contains a unique programmable delay chain.
Figure
Logic Array
Combinatorial
2–27:
input (1)
Output
Input
OE
Output Register
Input Register
OE Register
D
D
D
Figure 2–29
Q
Q
Q
Figure 2–28
shows how a column
shows how a row
Altera Corporation
May 2008

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