EP2AGX65DF29C6N Altera, EP2AGX65DF29C6N Datasheet - Page 71

• Manufacturer Part Number: EP2AGX65DF29C6N
• Description: IC ARRIA II GX FPGA 65K 780FBGA
• Manufacturer: Altera
• Series: Arria II GXr

Specifications of EP2AGX65DF29C6N

• Number Of Logic Elements/cells: 60214
• Number Of Labs/clbs: 2530
• Total Ram Bits: 5246
• Number Of I /o: 364
• Voltage - Supply: 0.87 V ~ 0.93 V
• Mounting Type: Surface Mount
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 780-FBGA
• Family Name: Arria® II GX
• Number Of Logic Blocks/elements: 63250
• # I/os (max): 364
• Frequency (max): 400MHz
• Operating Supply Voltage (typ): 900mV
• Logic Cells: 63250
• Ram Bits: 5557452.8
• Operating Supply Voltage (min): 0.87V
• Operating Supply Voltage (max): 0.93V
• Operating Temp Range: 0C to 85C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 780
• Package Type: FC-FBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of Gates: -
• Lead Free Status / Rohs Status: Compliant

Chapter 1: Device Datasheet for Arria II Devices
Switching Characteristics
Table 1–47. DSP Block Performance Specifications for Arria II GZ Devices
Table 1–48. Embedded Memory Block Performance Specifications for Arria II GX Devices
December 2010 Altera Corporation
Double mode
Notes to
(1) Maximum is for fully pipelined block with Round and Saturation disabled.
(2) Maximum for loopback input registers disabled, Round and Saturation disabled, and pipeline and output registers enabled.
Memory
Logic
Array
Block
(MLAB)
M9K
Block
Memory
Table
Single port 64 × 10
Simple dual-port 32 × 20 single
clock
Simple dual-port 64 × 10 single
clock
Single-port 256 × 36
Single-port 256 × 36, with the
read-during-write option set to
Old Data
Simple dual-port 256 × 36 single
CLK
Single-port 256 × 36 single CLK,
with the read-during-write option
set to Old Data
True dual port 512 × 18 single CLK
True dual-port 512 × 18 single CLK,
with the read-during-write option
set to Old Data
Min Pulse Width (clock high time)
Min Pulse Width (clock low time)
1–47:
Mode
Embedded Memory Block Specifications
Table 1–48
Mode
lists the embedded memory block specifications for Arria II GX devices.
Multipliers
Resources
Number of
Used
1
ALUTs
Resources Used
—
—
0
0
0
0
0
0
0
0
0
Embedded
Memory
—
—
1
1
1
1
1
1
1
1
1
Arria II Device Handbook Volume 3: Device Datasheet and Addendum
440
–3
450
270
428
360
250
360
250
360
250
900
730
I3
(Note 1)
Performance
690
500
500
500
400
280
400
280
400
280
850
C4
Performance
C5,I5
450
450
450
360
250
360
250
360
250
950
770
380
–4
1130
378
378
378
310
210
310
210
310
210
920
C6
MHz
Unit
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
Unit
ps
ps
1–63