XCS05-3VQ100I Xilinx Inc, XCS05-3VQ100I Datasheet - Page 30

IC FPGA 5V I-TEMP 100-VQFP

XCS05-3VQ100I

Manufacturer Part Number
XCS05-3VQ100I
Description
IC FPGA 5V I-TEMP 100-VQFP
Manufacturer
Xilinx Inc
Series
Spartan™r
Datasheet

Specifications of XCS05-3VQ100I

Number Of Logic Elements/cells
238
Number Of Labs/clbs
100
Total Ram Bits
3200
Number Of I /o
77
Number Of Gates
5000
Voltage - Supply
4.5 V ~ 5.5 V
Mounting Type
Surface Mount
Operating Temperature
-40°C ~ 100°C
Package / Case
100-TQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant

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0
Spartan and Spartan-XL FPGA Families Data Sheet
to the DONE pin. User I/Os for each device become active
after the DONE pin for that device goes High. (The exact
timing is determined by development system options.)
Since the DONE pin is open-drain and does not drive a High
value, tying the DONE pins of all devices together prevents
all devices in the chain from going High until the last device
30
DATA BUS
PROGRAM
CCLK
INIT
8
3.3K
VCC
V CC
CS1
D0-D7
PROGRAM
INIT
CCLK
M0
Spartan-XL
Figure 27: Express Mode Circuit Diagram
DOUT
DONE
M1
www.xilinx.com
8
in the chain has completed its configuration cycle. If the
DONE pin of a device is left unconnected, the device
becomes active as soon as that device has been config-
ured. Only devices supporting Express mode can be used
to form an Express mode daisy chain.
8
PROGRAM
CS1
D0-D7
INIT
Daisy-Chained
CCLK
M0
Spartan-XL
Optional
DONE
DOUT
M1
DS060 (v1.8) June 26, 2008
Product Specification
To Additional
Optional
Daisy-Chained
Devices
To Additional
Optional
Daisy-Chained
Devices
DS060_27_080400
R

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