XE8807AMI026TLF Semtech, XE8807AMI026TLF Datasheet - Page 88
XE8807AMI026TLF
Manufacturer Part Number
XE8807AMI026TLF
Description
IC MCU LOW PWR MTP FLASH 32-TQFP
Manufacturer
Semtech
Datasheet
1.XE8807AMI026TLF.pdf
(143 pages)
Specifications of XE8807AMI026TLF
Applications
Sensing Machine
Core Processor
RISC
Program Memory Type
FLASH (11 kB)
Controller Series
XE8000
Ram Size
512 x 8
Interface
UART, USRT
Number Of I /o
24
Voltage - Supply
2.4 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
32-TQFP, 32-VQFP
For Use With
XE8000MP - PROG BOARD AND PROSTART2 CARD
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
XE8807AMI026TR
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
XE8807AMI026TLF
Manufacturer:
IDT
Quantity:
62
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14.8.2.1
In this case, the interface will not look for a start sequence. The incoming data stream will be decoded according to
the selected PCM code and will be stored in the reception FIFO as soon as the reception mode is enabled. The
message start has to be detected by software.
14.8.2.2
The NRZ coding has no defined start sequence. Selecting the “protocol” start sequence in NRZ has the same
effect as no start detection.
In the bi-phase or Manchester code, any protocol violation is considered as a start sequence i.e. a 1-level or 0-level
which is longer than the duration of a chip. An example is shown in Figure 14-3.
In the delay modulation or Miller coding, any protocol violation is considered as a start sequence i.e. a 1-level or 0-
level which is longer than the duration of 2 chips.
Figure 14-3 : Start sequence type in Bi-Phase-Level encoding
14.8.2.3
An external start detection signal can be used. This signal should be connected to the pin RFIF2. The falling edge
of RFIF2 (also called “match”, see Figure 14-1) indicates the first valid bit of the message. This edge has to occur
during the first half of the first bit as shown in Figure 14-4. The minimal width of the pulse is half a bit.
© Semtech 2006
Bi-Phase - Level
“Protocol” start detection
“External” start detection
No start sequence detection
codes
1
bit sequence
1
Table 14-13. Start detection mode selection
0
1
“pattern 8bits”
1
“protocol”
“external”
0
“None”
name
start detection mode
0
0
1
start sequence
1
14-8
5 x '1'
RfifEnStart[1:0]
1
1
00
01
10
11
first valid bit
1
0
0
1
0
sequence
3 x '0'
other
start
0
XE8806A/XE8807A
0
first valid bit
1
1
0
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