XE8802MI035LF Semtech, XE8802MI035LF Datasheet - Page 63

IC DAS 16BIT FLASH 8K 100-LQFP

XE8802MI035LF

Manufacturer Part Number
XE8802MI035LF
Description
IC DAS 16BIT FLASH 8K 100-LQFP
Manufacturer
Semtech
Datasheet

Specifications of XE8802MI035LF

Applications
Sensing Machine
Core Processor
RISC
Program Memory Type
FLASH (22 kB)
Controller Series
XE8000
Ram Size
1K x 8
Interface
SPI, UART
Number Of I /o
36
Voltage - Supply
2.4 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
100-LQFP
For Use With
XE8000MP - PROG BOARD AND PROSTART2 CARD
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
XE8802MI035LF
Manufacturer:
TI
Quantity:
8 700
Part Number:
XE8802MI035LF
Manufacturer:
Semtech
Quantity:
10 000
Once memorized, an interrupt flag can be cleared by writing a ‘1’ in the corresponding bit of RegIrqHig, RegIrqMid
or RegIrqLow. Writing a ‘0’ does not modify the flag. To definitively clear the interrupt, one has to clear the
CoolRISC interrupt in the CoolRISC stat register. All interrupts are automatically cleared after a reset.
Two registers are provided to facilitate the writing of interrupt service software. RegIrqPriority contains the number
of the highest priority set (its value is 0xFF when no interrupt is memorized). RegIrqIrq indicates the priority level of
the currently activated interrupts.
All interrupt sources are sampled by the highest frequency in the system. A CPU interruption is generated and
memorized when an interrupt becomes high. Between the rising edge of the interrupt on the peripheral and the
rising edge on the CoolRISC core, there is a latency of one clock cycle.
8.5
This chapter describes an example of the software used for the interrupt handler. This software is present by
default in the software development environments. It represents only one of several possible ways of handling the
interrupts.
© Semtech 2006
Interrupt handling software
RegIrqHig
RegIrqEnHig
stat
IE2
7
7
Figure 8-1. Principle of the interrupt handler.
IE1
6
6
XE8802 Sensing Machine Data Acquisition MCU
GIE
5
5
RegIrqLow RegIrqMid
IN2
8-5
4
4
with ZoomingADC™ and LCD driver
IN1
3
3
IN0
2
2
EV1
1
1
EV0
0
0
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