CY7C63413-PVC Cypress Semiconductor Corp, CY7C63413-PVC Datasheet - Page 8

• Manufacturer Part Number: CY7C63413-PVC
• Description: IC MCU 8K USB LS PERIPH 48-SSOP
• Manufacturer: Cypress Semiconductor Corp
• Series: M8™r

Specifications of CY7C63413-PVC

• Applications: USB Microcontroller
• Core Processor: M8B
• Program Memory Type: OTP (8 kB)
• Controller Series: CY7C634xx
• Ram Size: 256 x 8
• Interface: PS2, USB
• Number Of I /o: 32
• Voltage - Supply: 4 V ~ 5.5 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 48-SSOP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: 428-1319

3.0
4.0
4.1
The 14-bit program counter (PC) allows access for up to 8 kilobytes of EPROM using the CY7C634/5xx architecture. The program
counter is cleared during reset, such that the first instruction executed after a reset is at address 0x0000h. This is typically a jump
instruction to a reset handler that initializes the application.
The lower 8 bits of the program counter are incremented as instructions are loaded and executed. The upper 6 bits of the program
counter are incremented by executing an XPAGE instruction. As a result, the last instruction executed within a 256 byte “page”
of sequential code should be an XPAGE instruction. The assembler directive “XPAGEON” will cause the assembler to insert
XPAGE instructions automatically. As instructions can be either one or two bytes long, the assembler may occasionally need to
insert a NOP followed by an XPAGE for correct execution.
The program counter of the next instruction to be executed, carry flag, and zero flag are saved as two bytes on the program stack
during an interrupt acknowledge or a CALL instruction. The program counter, carry flag, and zero flag are restored from the
program stack only during a RETI instruction.
Please note the program counter cannot be accessed directly by the firmware. The program stack can be examined by reading
SRAM from location 0x00 and up.
4.2
The accumulator is the general purpose, do everything register in the architecture where results are usually calculated.
4.3
The index register “X” is available to the firmware as an auxiliary accumulator. The X register also allows the processor to perform
indexed operations by loading an index value into X.
4.4
During a reset, the program stack pointer (PSP) is set to zero. This means the program “stack” starts at RAM address 0x00 and
“grows” upward from there. Note the program stack pointer is directly addressable under firmware control, using the MOV PSP,A
instruction. The PSP supports interrupt service under hardware control and CALL, RET, and RETI instructions under firmware
control.
Name
D+, D–
P0[7:0]
P1[7:0]
P2[7:0]
P3[7:0]
DAC[7:0] I/O
XTAL
XTAL
V
V
Vss
PP
CC
IN
OUT
14-bit Program Counter (PC)
8-bit Accumulator (A)
8-bit Index Register (X)
8-bit Program Stack Pointer (PSP)
Pin Assignments
Programming Model
OUT
I/O
I/O
I/O
I/O
I/O
I/O
IN
15,26,16,25,
11,30,12,29,
17,24,18,23
13,28,14,27
9,32,10,31
7,34,8,33,
3,38,4,37,
5,36,6,35
40-Pin
20,39
CY7C63411/12/13
1,2
n/a
21
22
19
40
17,32,18,31,
11,38,12,37,
19,30,20,29
13,36,14,35
9,40,10,39
7,42,8,41,
3,46,4,45,
5,44,6,43
48-Pin
24,47
1,2
n/a
25
26
23
48
CY7C63511/12/13
17,32,18,31,
11,38,12,37,
15,34,16,33,
19,30,20,29
13,36,14,35
21,28,22,27
9,40,10,39
7,42,8,41,
3,46,4,45,
5,44,6,43
48-Pin
24,47
1,2
25
26
23
48
8
Description
USB differential data; PS/2 clock and data signals
GPIO port 0 capable of sinking 7 mA (typical)
GPIO Port 1 capable of sinking 7 mA (typical)
GPIO Port 2 capable of sinking 7 mA (typical)
GPIO Port 3 capable of sinking 12 mA (typical)
DAC I/O Port with programmable current sink outputs.
DAC[1:0] offer a programmable range of 3.2 to 16 mA
typical. DAC[7:2] have a programmable sink current range
of 0.2 to 1.0 mA typical.
6 MHz ceramic resonator or external clock input
6 MHz ceramic resonator
Programming voltage supply, ground for normal operation
Voltage supply
Ground
CY7C63411/12/13
CY7C63511/12/13