MPC860TVR50D4 Freescale Semiconductor, MPC860TVR50D4 Datasheet - Page 33

IC MPU POWERQUICC 50MHZ 357PBGA

MPC860TVR50D4

Manufacturer Part Number
MPC860TVR50D4
Description
IC MPU POWERQUICC 50MHZ 357PBGA
Manufacturer
Freescale Semiconductor
Series
PowerQUICC Ir
Datasheet

Specifications of MPC860TVR50D4

Processor Type
MPC8xx PowerQUICC 32-Bit
Speed
50MHz
Voltage
3.3V
Mounting Type
Surface Mount
Package / Case
357-PBGA
Processor Series
MPC8xx
Core
MPC8xx
Data Bus Width
32 bit
Maximum Clock Frequency
50 MHz
Operating Supply Voltage
2.5 V, 3.3 V
Maximum Operating Temperature
+ 95 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
0 C
Core Size
32 Bit
Program Memory Size
8KB
Cpu Speed
50MHz
Embedded Interface Type
Ethernet, I2C, SPI, UART
Digital Ic Case Style
BGA
No. Of Pins
357
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MPC860TVR50D4
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Part Number:
MPC860TVR50D4
Manufacturer:
FREESCALE
Quantity:
1
Part Number:
MPC860TVR50D4R2
Manufacturer:
Freescale Semiconductor
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Table 8
1
Figure 23
Figure 24
Freescale Semiconductor
Num
The timings I39 and I40 describe the testing conditions under which the IRQ lines are tested when being defined as
level-sensitive. The IRQ lines are synchronized internally and do not have to be asserted or negated with reference to the
CLKOUT.
The timings I41, I42, and I43 are specified to allow the correct function of the IRQ lines detection circuitry and have no direct
relation with the total system interrupt latency that the MPC860 is able to support.
I39
I40
I41
I42
I43
provides interrupt timing for the MPC860.
IRQx valid to CLKOUT rising edge (setup time)
IRQx hold time after CLKOUT
IRQx pulse width low
IRQx pulse width high
IRQx edge-to-edge time
CLKOUT
provides the interrupt detection timing for the external level-sensitive lines.
provides the interrupt detection timing for the external edge-sensitive lines.
CLKOUT
IRQx
IRQx
Figure 23. Interrupt Detection Timing for External Level Sensitive Lines
Figure 24. Interrupt Detection Timing for External Edge Sensitive Lines
MPC860 PowerQUICC™ Family Hardware Specifications, Rev. 8
Characteristic
Table 8. Interrupt Timing
1
I39
I43
I41
I40
I43
4 × T
CLOCKOUT
2.00
3.00
3.00
6.00
Min
I42
All Frequencies
Max
Bus Signal Timing
Unit
ns
ns
ns
ns
33

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