MPC8349EVVAJFB Freescale Semiconductor, MPC8349EVVAJFB Datasheet - Page 8

IC MPU POWERQUICC II 672-TBGA

MPC8349EVVAJFB

Manufacturer Part Number
MPC8349EVVAJFB
Description
IC MPU POWERQUICC II 672-TBGA
Manufacturer
Freescale Semiconductor
Series
PowerQUICC II PROr
Datasheet

Specifications of MPC8349EVVAJFB

Processor Type
MPC83xx PowerQUICC II Pro 32-Bit
Speed
533MHz
Voltage
1.2V
Mounting Type
Surface Mount
Package / Case
672-TBGA
Processor Series
MPC8xxx
Core
e300
Data Bus Width
32 bit
Development Tools By Supplier
MPC8349E-MITXE
Maximum Clock Frequency
533 MHz
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
I/o Voltage
1.8 V, 2.5 V, 3.3 V
Minimum Operating Temperature
0 C
Core Size
32 Bit
Program Memory Size
64KB
Cpu Speed
533MHz
Embedded Interface Type
I2C, SPI, USB, UART
Digital Ic Case Style
TBGA
No. Of Pins
672
Rohs Compliant
Yes
For Use With
MPC8349E-MITX-GP - KIT REFERENCE PLATFORM MPC8349EMPC8349E-MITXE - BOARD REFERENCE FOR MPC8349MPC8349EA-MDS-PB - KIT MODULAR DEV SYSTEM MPC8349E
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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Electrical Characteristics
2.1.2
Table 2
Table 2
conditions is not guaranteed.
Figure 2
8
Core supply voltage for 667-MHz core frequency
Core supply voltage
PLL supply voltage for 667-MHz core frequency
PLL supply voltage
DDR and DDR2 DRAM I/O voltage
Three-speed Ethernet I/O supply voltage
Three-speed Ethernet I/O supply voltage
PCI, local bus, DUART, system control and power
management, I
Note:
1
GV
negative direction.
DD
, LV
provides the recommended operating conditions for the MPC8349EA. Note that the values in
are the recommended and tested operating conditions. Proper device operation outside these
shows the undershoot and overshoot voltages at the interfaces of the MPC8349EA.
DD
MPC8349EA PowerQUICC II Pro Integrated Host Processor Hardware Specifications, Rev. 12
Power Supply Voltage Specification
, OV
2
C, and JTAG I/O voltage
DD
V
Note:
, AV
V
1. t
IH
IL
DD
interface
Parameter
Figure 2. Overshoot/Undershoot Voltage for GV
G/L/OV
, and V
G/L/OV
GND – 0.3 V
GND – 0.7 V
refers to the clock period associated with the bus clock interface.
G/L/OV
DD
DD
Table 2. Recommended Operating Conditions
DD
+ 20%
must track each other and must vary in the same direction—either in the positive or
+ 5%
GND
DD
Not to Exceed 10%
Symbol
LV
LV
of t
GV
OV
AV
AV
V
V
DD
DD
DD1
DD2
DD
DD
interface
DD
DD
1
Recommended
2.5 V ± 125 mV
3.3 V ± 330 mV
2.5 V ± 125 mV
3.3 V ± 330 mV
2.5 V ± 125 mV
3.3 V ± 330 mV
1.3 V ± 60 mV
1.2 V ± 60 mV
1.3 V ± 60 mV
1.2 V ± 60 mV
1.8 V ± 90 mV
DD
/OV
Value
DD
/LV
DD
Freescale Semiconductor
Unit
V
V
V
V
V
V
V
V
Notes
1
1
1
1

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