MPC8541EPXAQF Freescale Semiconductor, MPC8541EPXAQF Datasheet - Page 7

IC MPU POWERQUICC III 783-FCPBGA

MPC8541EPXAQF

Manufacturer Part Number
MPC8541EPXAQF
Description
IC MPU POWERQUICC III 783-FCPBGA
Manufacturer
Freescale Semiconductor
Series
PowerQUICC IIIr
Datasheets

Specifications of MPC8541EPXAQF

Processor Type
MPC85xx PowerQUICC III 32-Bit
Speed
1.0GHz
Voltage
1.3V
Mounting Type
Surface Mount
Package / Case
783-FCPBGA
Core Size
32 Bit
Program Memory Size
64KB
Cpu Speed
1GHz
Embedded Interface Type
I2C, SPI, UART
Digital Ic Case Style
BGA
No. Of Pins
783
Rohs Compliant
No
For Use With
MPC8548CDS - DEV TOOLS CDS FOR 8548CWH-PPC-8540N-VE - KIT EVAL SYSTEM MPC8540
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Features
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MPC8541EPXAQF
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
2
This section provides the AC and DC electrical specifications and thermal characteristics for the
MPC8541E. The MPC8541E is currently targeted to these specifications. Some of these specifications are
independent of the I/O cell, but are included for a more complete reference. These are not purely I/O buffer
design specifications.
2.1
This section covers the ratings, conditions, and other characteristics.
Freescale Semiconductor
— Selectable hardware-enforced coherency
— Selectable clock source (SYSCLK or independent PCI_CLK)
Power management
— Fully static 1.2-V CMOS design with 3.3- and 2.5-V I/O
— Supports power save modes: doze, nap, and sleep
— Employs dynamic power management
— Selectable clock source (sysclk or independent PCI_CLK)
System performance monitor
— Supports eight 32-bit counters that count the occurrence of selected events
— Ability to count up to 512 counter specific events
— Supports 64 reference events that can be counted on any of the 8 counters
— Supports duration and quantity threshold counting
— Burstiness feature that permits counting of burst events with a programmable time between
— Triggering and chaining capability
— Ability to generate an interrupt on overflow
System access port
— Uses JTAG interface and a TAP controller to access entire system memory map
— Supports 32-bit accesses to configuration registers
— Supports cache-line burst accesses to main memory
— Supports large block (4-Kbyte) uploads and downloads
— Supports continuous bit streaming of entire block for fast upload and download
IEEE Std 1149.1™-compatible, JTAG boundary scan
783 FC-PBGA package
Electrical Characteristics
MPC8541E PowerQUICC™ III Integrated Communications Processor Hardware Specification, Rev. 4.2
Overall DC Electrical Characteristics
bursts
Electrical Characteristics
7

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