CS4272-DZZ Cirrus Logic Inc, CS4272-DZZ Datasheet - Page 7

• Manufacturer Part Number: CS4272-DZZ
• Description: IC CODEC 24BIT 114DB 28-TSSOP
• Manufacturer: Cirrus Logic Inc
• Type: Stereo Audior

Specifications of CS4272-DZZ

• Data Interface: Serial
• Resolution (bits): 24 b
• Number Of Adcs / Dacs: 2 / 2
• Sigma Delta: Yes
• Dynamic Range, Adcs / Dacs (db) Typ: 114 / 114
• Voltage - Supply, Analog: 4.75 V ~ 5.25 V
• Voltage - Supply, Digital: 3.1 V ~ 5.25 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 28-TSSOP
• Audio Codec Type: Stereo
• No. Of Adcs: 2
• No. Of Dacs: 2
• No. Of Input Channels: 3
• No. Of Output Channels: 3
• Adc / Dac Resolution: 24bit
• Adcs / Dacs Signal To Noise Ratio: 114dB
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 598-1004 - EVAL BOARD CS4272 STEREO CODEC
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

1.7
1.8
dielectric absorption properties. The HPF formed by this R-C pair must be such that the volt-
age across the aluminum electrolytic DC-block capacitor is minimal at 20 Hz. This keeps the
distortion due to the electrolytic's dielectric absorption properties to a minimum. For a design
utilizing only LPF configuration 1, there is no post-LPF resistor-divider pad, and a much
smaller value capacitor can be used (22 F).
Similar to the output DC-block capacitor described above, the value of the AC coupling
capacitor from the non-inverting input of the 2-pole low pass to ground (C23 for AOUTR) was
also chosen to minimize the rise in distortion performance at low frequency due to the elec-
trolytic's dielectric absorption properties. These properties become apparent only as the
signal level on that leg increases to the levels output from the differential amp used in LPF
configuration 2. For a design utilizing only LPF configuration 1, the levels on that leg are suf-
ficiently low, and a much smaller value capacitor can be used (22 F).
Switch S1 allows stand-alone hardware signal routing and configuration of the CDB4272.
See Table 2 for a list of the various options available. After changing settings using S1, the
user must assert a reset by pressing the RESET button (S2).
Operation in stand-alone mode requires the parallel port cable to remain disconnected from
the DB-25 connector (J31). Connecting a cable to the connector will enable the PC control
port, automatically disabling switch S1 and its associated logic.
A graphical user interface is included with the CDB4272 to allow easy manipulation of all reg-
isters of the CS4272 and hardware configuration of the CDB4272. Connecting a cable to the
DB-25 connector (J31) will enable the PC control port, automatically disabling switch S1 and
its associated logic.
Stand-Alone Control
PC Parallel Port Control
CDB4272
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