TLE7263E Infineon Technologies, TLE7263E Datasheet - Page 21

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TLE7263E

Manufacturer Part Number
TLE7263E
Description
IC SYSTEM BASIS CHIP DSO-36
Manufacturer
Infineon Technologies
Datasheet

Specifications of TLE7263E

Controller Type
System Basis Chip
Interface
SPI
Voltage - Supply
13.5V
Current - Supply
1mA
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Package / Case
DSO-36
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
SP000075929
TLE7263E
TLE7263EINTR

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
TLE7263E
Manufacturer:
INFINEON/英飞凌
Quantity:
20 000
4.11
The 16-bit wide Programming or Input Word (see
DI, which is synchronized with the clock input CLK supplied by the C. The Diagnosis or
Output Word appears synchronously at the data output DO (see
The transmission cycle begins when the chip is selected by the Chip Select Not input
CSN (“low” active). After the CSN input returns from L to H, the word that has been read
in becomes the new control word. The DO output switches to tristate status at this point,
thereby releasing the DO bus for other usage.
The state of DI is shifted into the input register with every falling edge on CLK. The state
of DO is shifted out of the output register after every rising edge on CLK. The number of
received input clocks is supervised by a modulo-16 operation and the Input / Control
Word is discarded in case of a mismatch. This error is flagged by the WKO set to “low”
and in the following SPI output by a “high” at the data output (DO pin) before the first
rising edge of the clock is received.
Figure 11
Data Sheet
SPI_Bit_Settings
Input
Data
SPI (Serial Peripheral Interface)
16-Bit SPI Input Data / Control Word
On/Off
MSB
15 14 13 12 11 10
WD
On/off
V
CC2
On/Off
Res.
Reserved
CTM
On/Off
OUTHS
Select
„off“
SI
Configuration Registers
On/Off
MON4
On-Time
OUTHS
0
MON3
On/Off
Sense /
Cyclic
Wake
Reserved
(Watchdog Trigger Register)
Window Watchdog Timing
MON2
On/Off
Cyclic Sense / Wake Timing
9
Bit Position: 10 .. 5
MON1
On/Off
Bit Position: 9 .. 5
21
8
10.4k
LIN
7
Reset
Delay
6
Table
OUTHS
Thres.
Reset
On/Off
5
Configuration
CS1
3) is read in via the data input
4
10
11
00
01
Select
CS0
3
Mode Selection
CAN RxD Only
MS2
LIN RxD Only
2
CAN Sleep
Figure
LIN Sleep
not valid
Active
Active
Active
Sleep
Stop
Bits
Rev. 1.51, 2007-06-22
MS1
1
LSB
MS0
0
10).
TLE 7263E
011
100
101
110
111
001
000
010
Features

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