DS21FT42 Maxim Integrated Products, DS21FT42 Datasheet - Page 80

IC FRAMER T1 4X3 12CH 300-BGA

DS21FT42

Manufacturer Part Number
DS21FT42
Description
IC FRAMER T1 4X3 12CH 300-BGA
Manufacturer
Maxim Integrated Products
Datasheet

Specifications of DS21FT42

Controller Type
T1 Framer
Interface
Parallel/Serial
Voltage - Supply
2.97 V ~ 3.63 V
Current - Supply
225mA
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
300-BGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant

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Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DS21FT42
Manufacturer:
Maxim Integrated
Quantity:
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Manufacturer:
Maxim Integrated
Quantity:
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RDNCD: RECEIVE DOWN CODE DEFINITION REGISTER (Address=15 Hex)
20.
Each of the 24 T1 channels in the transmit direction of the framer can be either forced to be transparent or
in other words, can be forced to stop Bit 7 Stuffing and/or Robbed Signaling from overwriting the data in
the channels. Transparency can be invoked on a channel by channel basis by properly setting the TTR1,
TTR2, and TTR3 registers.
TTR1/TTR2/TTR3: TRANSMIT TRANSPARENCY REGISTER
(Address=39 to 3B Hex)
Each of the bit position in the Transmit Transparency Registers (TTR1/TTR2/TTR3) represent a DS0
channel in the outgoing frame. When these bits are set to a one, the corresponding channel is transparent
(or clear). If a DS0 is programmed to be clear, no robbed bit signaling will be inserted nor will the
channel have Bit 7 stuffing performed. However, in the D4 framing mode, Bit 2 will be overwritten by a
zero when a Yellow Alarm is transmitted. Also the user has the option to prevent the TTR registers from
(MSB)
CH16
CH24
(MSB)
CH8
SYMBOLS
SYMBOL
C7
CH1-24
TRANSMIT TRANSPARENCY
C7
C6
C5
C4
C3
C2
C1
C0
CH15
CH23
CH7
C6
POSITIONS
POSITION
TTR1.0-3.7
CH14
CH22
RDNCD.7
RDNCD.6
RDNCD.5
RDNCD.4
RDNCD.3
RDNCD.2
RDNCD.1
RDNCD.0
CH6
C5
CH13
CH21
CH5
NAME AND DESCRIPTION
Receive Down Code Definition Bit 7. First bit of the
repeating pattern.
Receive Down Code Definition Bit 6. A Don’t Care if a 1
bit length is selected.
Receive Down Code Definition Bit 5. A Don’t Care if a 1
or 2 bit length is selected.
Receive Down Code Definition Bit 4. A Don’t Care if a 1
to 3 bit length is selected.
Receive Down Code Definition Bit 3. A Don’t Care if a 1
to 4 bit length is selected.
Receive Down Code Definition Bit 2. A Don’t Care if a 1
to 5 bit length is selected.
Receive Down Code Definition Bit 1. A Don’t Care if a 1
to 6 bit length is selected.
Receive Down Code Definition Bit 0. A Don’t Care if a 1
to 7 bit length is selected.
NAME AND DESCRIPTION
Transmit Transparency Registers.
0 = this DS0 channel is not transparent
1 = this DS0 channel is transparent
C4
CH12
CH20
CH4
80 of 114
C3
CH11
CH19
CH3
CH10
CH18
CH2
C2
(LSB)
CH17
CH1
CH9
C1
TTR2 (3A)
TTR3 (3B)
TTR1 (39)
(LSB)
C0

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