MAX8710ETG+T Maxim Integrated Products, MAX8710ETG+T Datasheet - Page 14

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MAX8710ETG+T

Manufacturer Part Number
MAX8710ETG+T
Description
Charge Pumps Linear-Reg LCD Panel Power Supply
Manufacturer
Maxim Integrated Products
Datasheet

Specifications of MAX8710ETG+T

Lead Free Status / Rohs Status
Lead free / RoHS Compliant
reference voltage, the controller lowers the base current
of the pnp transistor, which reduces the amount of cur-
rent delivered to the output. If the feedback voltage is too
low, the device increases the pnp transistor’s base cur-
rent, which allows more current to pass to the output and
raises the output voltage. The linear regulator also
includes an output current limit that protects the internal
pass transistor against short circuits.
The input voltage range of the linear regulator is from 8V
to 28V. The Typical Operating Circuits shown use a 12V
input. The output voltage range of the linear regulator
(OUTL) is up to 28V (MAX8710/MAX8761) or up to 13.2V
(MAX8711/MAX8712). The linear-regulator output is used
to generate the AV
rail for source-driver ICs in TFT LCD panels. The typical
load of the AV
peak current of approximately 1A and pulse width of
Low-Cost, Linear-Regulator
LCD Panel Power Supplies
Figure 3. MAX8712 Typical Operating Circuit
14
-5V/50mA
GOFF
______________________________________________________________________________________
5V/1mA
SHDN
REF
DD
1µF
110kΩ
100kΩ
supply is a periodic pulsed load, with a
1%
1%
R5
R6
DD
voltage, which is the analog supply
MMBD4148SE
(FAIRCHILD)
0.47µF
0.1µF
0.22µF
GND
DLP
DRVN
FBN
REF
SHDN
GND
0.1µF
MAX8712
IN
IN
10.8V TO 13.2V
approximately 2µs. The typical period of the pulse load is
between 8.9µs and 31.7µs. The excellent transient perfor-
mance of the linear regulator can easily meet this tran-
sient-response requirement.
The linear regulator can deliver at least 300mA (500mA
for the MAX8761) output current continuously with a
4.7µF (10µF for the MAX8761) output capacitor. Do not
allow the device power dissipation to exceed the pack-
age-dissipation limit listed in the Absolute Maximum
Ratings section. The power dissipation can be estimated
by multiplying the voltage difference between the input
and the output with the required maximum continuous
output current. For applications where the power dissipa-
tion exceeds the package limit, see the External
Transistor for Higher Current or Power Dissipation section
for more information.
INL
OUTL
DRVP
FBP
FBL
33.2kΩ
33.2kΩ
1%
1%
R2
R4
0.1µF
0.1µF
47pF
10µF
C1
MMBD4148
100kΩ
325kΩ
1%
R1
1%
R3
2x MMBD4148SE
(FAIRCHILD)
4.7µF
0.1µF
1µF
1µF
10V/300mA
AV
27V/20mA
DD
GON

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