MAX8710ETG+T Maxim Integrated Products, MAX8710ETG+T Datasheet - Page 16

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MAX8710ETG+T

Manufacturer Part Number
MAX8710ETG+T
Description
Charge Pumps Linear-Reg LCD Panel Power Supply
Manufacturer
Maxim Integrated Products
Datasheet

Specifications of MAX8710ETG+T

Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Low-Cost, Linear-Regulator
LCD Panel Power Supplies
The linear regulator is enabled whenever REF is in regula-
tion and SHDN is logic high. Each time it is enabled, the
linear regulator goes through a soft-start routine by ramp-
ing up its internal reference voltage from 0 to 2.5V in 128
steps. The soft-start period is 2.73ms (typ), and FBL fault
detection is disabled during this period. This soft-start
feature effectively limits the inrush current during startup.
The linear-regulator current-limit circuitry monitors the
current flowing through the internal pass transistor. The
internal current limit is approximately 800mA (1.1A for
the MAX8761). The linear-regulator output declines when
it is not able to supply the load current. If the FBL voltage
drops below 0.75V, the current limit folds back to
approximately 180mA (250mA for the MAX8761).
The MAX8710/MAX8711/MAX8712/MAX8761 monitor the
FBL voltage for undervoltage conditions. If V
uously below 2V (typ) for approximately 44ms, the device
latches off. The foldback current-limit circuit, in conjunc-
tion with the output undervoltage fault latch and thermal-
overload protection, protects the output load and the
internal pass transistor against short circuits or overloads.
The positive charge-pump regulator is typically used to
generate the positive supply rail for the TFT LCD gate-dri-
16
Figure 5. Charge-Pump Regulator Functional Diagram
V
SUPCP
C
V
OUT(NEG)
NEG
______________________________________________________________________________________
REF
Positive Charge-Pump Regulator
D3
D4
C
X(NEG)
FBN
SUPCP
DRVN
N2
P2
FBL
is contin-
OSCILLATOR
SEQUENCE
250mV
0.5 x V
REF
ver ICs. The output voltage is set with an external resistive
voltage-divider from its output to GND with the midpoint
connected to FBP. The number of charge-pump stages
and the setting of the feedback divider determine the out-
put voltage of the positive charge-pump regulator. The
charge-pump driver includes a high-side p-channel
MOSFET (P1) and a low-side n-channel MOSFET (N1) to
control the power transfer as shown in Figure 5. The
MOSFETs switch at a constant frequency of 1.5MHz.
During the first half-cycle, N1 turns on and allows V
(V
MAX8712) to charge up the flying capacitor C
through diode D1. The amount of charge transferred
from V
tance of N1, which varies according to the output of the
feedback error amplifier. The error amplifier compares
the feedback signal (FBP) with a 2.5V internal reference
and amplifies the difference. If the feedback signal is
below the reference, the error-amplifier output increases
the supply voltage of N1’s gate driver, lowering the on-
resistance. Similarly, if the feedback signal is above the
reference, the error-amplifier output reduces the driver
supply voltage, increasing the on-resistance. During the
second half-cycle, N1 turns off and P1 turns on, level
shifting C
SUPCP
INPUT
, MAX8710/MAX8761 or VOUTL, MAX8711/
X(POS)
to C
MAX8710
MAX8761
by V
X(POS)
P1
N1
INPUT
DRVP
FBP
is determined by the on-resis-
volts. This connects C
C
X(POS)
D1
D2
C
OUT(POS)
X(POS)
V
V
X(POS)
SUPCP
POS
INPUT

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